优化正数算法的节能解码和编码硬件

IF 2 4区 计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Aditya Anirudh Jonnalagadda;Rishi Thotli;Sreehari Veeramachaneni;Uppugunduru Anil Kumar;Syed Ershad Ahmed
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引用次数: 0

摘要

正数系统代表了一种二进制数字格式,主要是为了减轻现代计算机算法中常用的IEEE 754浮点标准的缺点而设计的。与使用固定宽度表示的IEEE 754不同,posiits提供可变大小的编码,根据表示的数字的大小动态调整分配的位数。这种适应性使位置能够在更广泛的值范围内提供更高的精度,解决诸如逐渐下溢以及IEEE 754中固有的零和NaN值的多重表示等问题。然而,动态位分配在将正数解码为其组成字段并在执行算术运算后将结果正数的字段打包回来时也提出了重大挑战。为了在实际计算系统中成为浮点数的可行替代方案,需要将位的解码和编码开销降至最低。因此,这封信的目的是为正位解码和编码开发节能的硬件。在能量需求方面,与文献相比,提出的$\ range16,2 \ range$正数解码器、解码器A和B分别提高了65%和33%以上。同样,所提出的$\langle 16,2\rangle $编码器电路比现有编码器电路节能52%以上。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Energy-Efficient Decoding and Encoding Hardware for Optimized Posit Arithmetic
The posit number system represents a binary numerical format devised primarily to mitigate the shortcomings of the IEEE 754 floating-point standard commonly used in modern computer arithmetic. Unlike IEEE 754, which utilizes a fixed-width representation, posits offer a variable-size encoding, dynamically adjusting the number of bits allocated based on the magnitude of the represented number. This adaptability enables posits to provide enhanced precision across a broader range of values, addressing issues like gradual underflow and the multiple representations of zero and NaN values inherent in IEEE 754. However, the dynamic bit allocation also poses significant challenges in decoding the posit number into its constituent fields and packing back the fields of the resultant posit once the arithmetic operations have been performed. For posits to become a viable alternative to floating-points in practical computing systems, the decoding and encoding overheads of posits need to be minimized. Hence, the aim of this letter is to develop energy-efficient hardware for posit decoding and encoding. The proposed $\langle 16,2\rangle $ posit decoders, Decoders A and B show an improvement of over 65% and 33% compared to literature in terms of energy requirements. Similarly, the proposed $\langle 16,2\rangle $ encoder circuit is over 52% more energy-efficient than existing encoder circuits.
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来源期刊
IEEE Embedded Systems Letters
IEEE Embedded Systems Letters Engineering-Control and Systems Engineering
CiteScore
3.30
自引率
0.00%
发文量
65
期刊介绍: The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software. The emphasis is on models, methods, and tools that ensure secure, correct, efficient and robust design of embedded systems and their applications.
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