用于减少数模转换器非线性的分层旋转二进制位置

IF 2.5 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2025-06-05 DOI:10.1016/j.vlsi.2025.102457

Mikhail M. Pilipko, Mikhail S. Yenuchenko

{"title":"用于减少数模转换器非线性的分层旋转二进制位置","authors":"Mikhail M. Pilipko, Mikhail S. Yenuchenko","doi":"10.1016/j.vlsi.2025.102457","DOIUrl":null,"url":null,"abstract":"<div><div>A capacitive digital-to-analog converter (DAC) is a key component in analog-to-digital converters of various types. Such DACs contain an array of capacitors that is affected by components mismatch appearing during integrated circuit production.</div><div>Placement schemes are an effective solution to mitigate the influence of systematic mismatch on linearity of data conversion. Previously known placement schemes have some weak points concerning the bit placement, e.g. anisotropy.</div><div>In order to overcome these drawbacks, an algorithm for the Hierarchical Rotated Binary Placement (HRBP) is proposed in this paper. This placement scheme suits even and odd resolutions. Over the range of 4–10 bits, it provides a linearity improvement of 3–69 % relative to other solutions. Extended evaluation methods confirm this improvement. A systematic approach for wire routing, regardless of a resolution, is also proposed.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"104 ","pages":"Article 102457"},"PeriodicalIF":2.5000,"publicationDate":"2025-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Hierarchical rotated binary placement for nonlinearity reduction in digital-to-analog converters\",\"authors\":\"Mikhail M. Pilipko, Mikhail S. Yenuchenko\",\"doi\":\"10.1016/j.vlsi.2025.102457\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>A capacitive digital-to-analog converter (DAC) is a key component in analog-to-digital converters of various types. Such DACs contain an array of capacitors that is affected by components mismatch appearing during integrated circuit production.</div><div>Placement schemes are an effective solution to mitigate the influence of systematic mismatch on linearity of data conversion. Previously known placement schemes have some weak points concerning the bit placement, e.g. anisotropy.</div><div>In order to overcome these drawbacks, an algorithm for the Hierarchical Rotated Binary Placement (HRBP) is proposed in this paper. This placement scheme suits even and odd resolutions. Over the range of 4–10 bits, it provides a linearity improvement of 3–69 % relative to other solutions. Extended evaluation methods confirm this improvement. A systematic approach for wire routing, regardless of a resolution, is also proposed.</div></div>\",\"PeriodicalId\":54973,\"journal\":{\"name\":\"Integration-The Vlsi Journal\",\"volume\":\"104 \",\"pages\":\"Article 102457\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2025-06-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Integration-The Vlsi Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167926025001142\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001142","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

摘要

电容式数模转换器（DAC）是各种模数转换器的关键部件。这种dac包含一组电容器，这些电容器在集成电路生产过程中会受到元件失配的影响。放置方案是缓解系统失配对数据转换线性度影响的有效解决方案。先前已知的放置方案在位放置方面存在一些弱点，例如各向异性。为了克服这些缺点，本文提出了一种分层旋转二值放置算法。这种安置方案适用于偶数和奇数分辨率。在4-10位范围内，相对于其他解决方案，它提供了3 - 69%的线性度改善。扩展的评价方法证实了这一改进。本文还提出了一种系统的布线方法，无论分辨率如何。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Hierarchical rotated binary placement for nonlinearity reduction in digital-to-analog converters

A capacitive digital-to-analog converter (DAC) is a key component in analog-to-digital converters of various types. Such DACs contain an array of capacitors that is affected by components mismatch appearing during integrated circuit production.

Placement schemes are an effective solution to mitigate the influence of systematic mismatch on linearity of data conversion. Previously known placement schemes have some weak points concerning the bit placement, e.g. anisotropy.

In order to overcome these drawbacks, an algorithm for the Hierarchical Rotated Binary Placement (HRBP) is proposed in this paper. This placement scheme suits even and odd resolutions. Over the range of 4–10 bits, it provides a linearity improvement of 3–69 % relative to other solutions. Extended evaluation methods confirm this improvement. A systematic approach for wire routing, regardless of a resolution, is also proposed.

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.