热和振动载荷下TSV显微组织的晶体塑性有限元模拟

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Guifang Chen , Xin You , Yeting Xu , Hongjiang Qian , Peng Wang
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引用次数: 0

摘要

通过硅通孔(TSV)微结构的可靠性是先进封装的关键。很少有研究涉及其在热循环、振动和热振动耦合载荷下的微观力学行为。本研究采用晶体塑性有限元法(CPFEM)对tsv的塑性变形进行了研究。塑性功(Wp)作为疲劳指标参数(FIP)用于裂纹起裂预测。CPFEM模拟结果表明,在低周疲劳(LCF)状态下,热-力耦合导致最大的Wp幅值,降低了疲劳寿命。振动载荷主要导致高周疲劳(HCF)或甚高周疲劳(VHCF)。热循环和热-机械耦合导致TSV-Cu和界面处多点形核,而振动载荷导致界面处单点形核。显微组织分析表明,热循环激活了四结晶界(GBs)的滑移系统,应力集中在聚集的软晶之间,周围是硬相。热-机械耦合导致三叉戟GBs从屈服的软相挤压出硬晶粒而产生裂纹。混合载荷作用下界面裂纹的位置与最硬晶粒的分布有关。这些结果强调了加载类型和微观结构在TSV降解中的重要性,强调了通过晶界工程和尺寸优化来缓解热机械疲劳的必要性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Crystal plasticity finite element simulation of TSV microstructure under thermal and vibration loading
The reliability of through-silicon-via (TSV) microstructures for advanced packaging is crucial. Few studies address their micro-mechanical behavior under thermal cycling, vibration, and thermal-vibration coupled loading. This study uses crystal plasticity finite element method (CPFEM) to investigate plastic deformation in TSVs. Plastic work (Wp) is used as a fatigue indicator parameter (FIP) for crack initiation prediction. CPFEM simulations show thermo-mechanical coupling causes the highest Wp amplitude, reducing fatigue life in the low-cycle fatigue (LCF) regime. Vibration loading mainly leads to high-cycle fatigue (HCF) or very high-cycle fatigue (VHCF). Crack initiation patterns vary: thermal cycling and thermo-mechanical coupling cause multi-site nucleation in TSV-Cu and at interfaces, while vibration loading results in single-point initiation at interfaces. Microstructural analysis reveals thermal cycling activates slip systems at quadruple-junction grain boundaries (GBs), with stress concentrations between clustered soft grains surrounded by hard phases. Thermo-mechanical coupling initiates cracks at trident GBs due to hard grain extrusion from yielding soft phases. Interface crack locations under hybrid loading relate to the distribution of the hardest grain. These results highlight the importance of loading type and microstructure in TSV degradation, emphasizing the need for grain boundary engineering and dimensional optimization to mitigate thermo-mechanical fatigue.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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