基于Goertzel算法的时域频率分析仪

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Mahsa Zareie;Kamal El-Sankary;Dalton Martini Colombo;Ezz El-Masry
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引用次数: 0

摘要

本文提出了一种新的二阶Goertzel频率分析仪的时域实现,它可以扩展到无限脉冲响应(IIR)/有限脉冲响应(FIR)滤波器中。为了克服传统时域滤波器的局限性,引入了一组时域算术电路,包括一步时间寄存器(TR)、时间放大器(TA)、时间加法器和单位延迟算子(${z}^{-1}$)。分析了各块的工作原理和非理想性,并与现有方法进行了比较。该滤波器采用180nm CMOS工艺,电源电压为0.9 v。所设计的频率分析仪可调,可提取400 Hz以内信号的幅值和相位角。针对采样频率为19.88 khz的280 hz信号,仿真结果表明,该滤波器可以在时域内检测电压信号的幅值和相位,误差小于5%。该滤波器的分辨率为$76.7~\text {dBV/s}$,功耗小于$24~\mu \text {W}$,估计的硅面积几乎为$0.828~\ mathm {mm}^{2}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Time-Domain Frequency Analyzer Based on Goertzel Algorithm
This article presents a novel time-domain implementation of the second-order Goertzel frequency analyzer, which can be extended for use in infinite impulse response (IIR)/finite impulse response (FIR) filters. A set of time-domain arithmetic circuits, including a one-step time register (TR), time amplifier (TA), time adder, and unit delay operator ( ${z}^{-1}$ ), are introduced to overcome the limitations of conventional time-domain filters. The working principles and nonidealities of each block are analyzed and compared with the existing methods. The proposed filter is implemented in a 180-nm CMOS process with a 0.9-V supply voltage. The designed frequency analyzer is tunable to extract the amplitude and phase angle of signals up to 400 Hz. Simulation results, targeting a 280-Hz signal at a 19.88-kHz sampling frequency, demonstrate that the filter can detect the amplitude and phase of a voltage signal in the time domain with an error below 5%. The filter achieves a resolution of $76.7~\text {dBV/s}$ , consumes less than $24~\mu \text {W}$ of power, and the estimated silicon area is almost $0.828~\mathrm {mm}^{2}$ .
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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