基于中间层的ESD保护：三维芯片封装可靠性的潜在解决方案。

IF 3 3区工程技术 Q2 CHEMISTRY, ANALYTICAL

Micromachines Pub Date : 2025-04-21 DOI:10.3390/mi16040488

Xunyu Li, Zijin Pan, Weiquan Hao, Runyu Miao, Zijian Yue, Albert Wang

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引用次数: 0

摘要

摩尔定律的终结呼唤集成电路（IC）技术和芯片设计的创新。异构集成（HI）以系统集成芯片（soic）和先进微封装（μ-封装）为特色，成为实现更多摩尔时间和超越摩尔时间的智能未来芯片的途径。可靠性，特别是静电（ESD）失效，是μ封装3D SoIC芯片面临的主要挑战，这是未来芯片可靠性设计的一个新兴挑战。这篇前瞻性文章阐明了基于介层的ESD保护将成为μ封装中3D SoIC芯片对抗破坏性ESD失效问题的重要潜在解决方案。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Interposer-Based ESD Protection: A Potential Solution for μ-Packaging Reliability of 3D Chips.

The ending of Moore's Law calls for innovations in integrated circuit (IC) technologies and chip designs. Heterogeneous integration (HI) emerges as a pathway towards smart future chips for more Moore time and for beyond-Moore time, featuring systems-on-integrated-chiplets (SoICs) and advanced micro-packaging (μ-packaging). Reliability, particularly with regard to electrostatic charge (ESD) failure, is a major challenge for 3D SoIC chips in μ-packaging, which is an emerging design-for-reliability challenge for future chips. This perspective article articulates that interposer-based ESD protection will be an important potential solution for 3D SoIC chips in μ-packaging against the devastating ESD failure problem.

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来源期刊

Micromachines NANOSCIENCE & NANOTECHNOLOGY-INSTRUMENTS & INSTRUMENTATION

CiteScore

5.20

自引率

14.70%

发文量

1862

审稿时长

16.31 days

期刊介绍： Micromachines (ISSN 2072-666X) is an international, peer-reviewed open access journal which provides an advanced forum for studies related to micro-scaled machines and micromachinery. It publishes reviews, regular research papers and short communications. Our aim is to encourage scientists to publish their experimental and theoretical results in as much detail as possible. There is no restriction on the length of the papers. The full experimental details must be provided so that the results can be reproduced.