Jiangbo Chen;Shengjie Wang;Nayu Li;Chunyi Song;Qun Jane Gu;Zhiwei Xu
{"title":"一种用于多模雷达应用的带1db步进饱和功率控制的v波段功率放大器","authors":"Jiangbo Chen;Shengjie Wang;Nayu Li;Chunyi Song;Qun Jane Gu;Zhiwei Xu","doi":"10.1109/LMWT.2025.3543260","DOIUrl":null,"url":null,"abstract":"This letter presents a V-band high-efficiency power amplifier (PA) with 1-dB step saturated output power (<inline-formula> <tex-math>${P} _{\\mathbf {sat}}$ </tex-math></inline-formula>) control resolution to support different radar applications. The power control is accomplished by digitally programming the transistor width of the 6-bit power-stage <inline-formula> <tex-math>${g} _{\\mathbf {m}}$ </tex-math></inline-formula> arrays. The two-way current-combining technique improves the output power and efficiency with a compact area. The PA is fabricated in 65-nm CMOS and occupies a compact core area of 0.079 mm<inline-formula> <tex-math>$^{\\mathbf {2}}$ </tex-math></inline-formula>. It achieves a <inline-formula> <tex-math>${P} _{\\mathbf {sat}}$ </tex-math></inline-formula> of 13.6 dBm with a 28.5% peak power-added efficiency (PAE) at 60.5 GHz. The measured <inline-formula> <tex-math>${P} _{\\mathbf {sat}}$ </tex-math></inline-formula> is >11.6 dBm at 55–67 GHz and has a 7-dB tuning range with a 1-dB step. The measured <inline-formula> <tex-math>${P} _{\\mathbf {sat}}$ </tex-math></inline-formula> control error is <0.21 dB with calibration.","PeriodicalId":73297,"journal":{"name":"IEEE microwave and wireless technology letters","volume":"35 5","pages":"565-568"},"PeriodicalIF":0.0000,"publicationDate":"2025-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A V-Band Power Amplifier With 1-dB Step Saturated Power Control for Multimode Radar Applications\",\"authors\":\"Jiangbo Chen;Shengjie Wang;Nayu Li;Chunyi Song;Qun Jane Gu;Zhiwei Xu\",\"doi\":\"10.1109/LMWT.2025.3543260\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter presents a V-band high-efficiency power amplifier (PA) with 1-dB step saturated output power (<inline-formula> <tex-math>${P} _{\\\\mathbf {sat}}$ </tex-math></inline-formula>) control resolution to support different radar applications. The power control is accomplished by digitally programming the transistor width of the 6-bit power-stage <inline-formula> <tex-math>${g} _{\\\\mathbf {m}}$ </tex-math></inline-formula> arrays. The two-way current-combining technique improves the output power and efficiency with a compact area. The PA is fabricated in 65-nm CMOS and occupies a compact core area of 0.079 mm<inline-formula> <tex-math>$^{\\\\mathbf {2}}$ </tex-math></inline-formula>. It achieves a <inline-formula> <tex-math>${P} _{\\\\mathbf {sat}}$ </tex-math></inline-formula> of 13.6 dBm with a 28.5% peak power-added efficiency (PAE) at 60.5 GHz. The measured <inline-formula> <tex-math>${P} _{\\\\mathbf {sat}}$ </tex-math></inline-formula> is >11.6 dBm at 55–67 GHz and has a 7-dB tuning range with a 1-dB step. The measured <inline-formula> <tex-math>${P} _{\\\\mathbf {sat}}$ </tex-math></inline-formula> control error is <0.21 dB with calibration.\",\"PeriodicalId\":73297,\"journal\":{\"name\":\"IEEE microwave and wireless technology letters\",\"volume\":\"35 5\",\"pages\":\"565-568\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2025-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE microwave and wireless technology letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10909689/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"0\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE microwave and wireless technology letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10909689/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"0","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A V-Band Power Amplifier With 1-dB Step Saturated Power Control for Multimode Radar Applications
This letter presents a V-band high-efficiency power amplifier (PA) with 1-dB step saturated output power (${P} _{\mathbf {sat}}$ ) control resolution to support different radar applications. The power control is accomplished by digitally programming the transistor width of the 6-bit power-stage ${g} _{\mathbf {m}}$ arrays. The two-way current-combining technique improves the output power and efficiency with a compact area. The PA is fabricated in 65-nm CMOS and occupies a compact core area of 0.079 mm$^{\mathbf {2}}$ . It achieves a ${P} _{\mathbf {sat}}$ of 13.6 dBm with a 28.5% peak power-added efficiency (PAE) at 60.5 GHz. The measured ${P} _{\mathbf {sat}}$ is >11.6 dBm at 55–67 GHz and has a 7-dB tuning range with a 1-dB step. The measured ${P} _{\mathbf {sat}}$ control error is <0.21 dB with calibration.