用于倒装球栅阵列（FCBGA）衬底的新型商用环氧-酚醛复合构筑膜的固化动力学

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-05-06 DOI:10.1016/j.mejo.2025.106717

Shanjun Ding, Jingyi Zhao, Xiaomeng Wu, Chuan Chen, Zhidan Fang, Qidong Wang

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引用次数: 0

摘要

切屑基片在固化过程中的界面分层开裂和收缩变形对可靠性有影响。因此，需要研究介电材料的固化行为，以调整晶片基板的固化过程，避免失效风险。然而，对于超大尺寸倒装芯片球栅阵列（FCBGA）衬底环氧树脂复合构筑膜的固化性能，目前还没有得到足够的研究。本文采用非等温差示扫描量热法，通过三种非等温固化动力学模型和无模型固化模型，研究了环氧酚醛复合堆积膜的固化行为，阐明了固化行为和机理。结果表明，环氧酚醛复合膜的固化反应过程符合Kamal固化动力学模型。采用三种无模型固化模型计算了不同固化程度下的激活能，表明激活能在整个固化过程中是可变的。这项工作将对今后衬底翘曲的模拟和预测有明显的帮助。

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Curing kinetics of a novel commercial epoxy-phenolic composite build-up film for flip-chip ball grid array (FCBGA) substrates

The interface delamination cracking and shrinkage deformation of chip substrates during curing process have influence on reliability. Therefore, curing behaviors in dielectric materials need to be studied to tune the curing process of chiplet substrates and avoid to failure risk. However, the curing behavior of epoxy resin composite build-up films for ultra large size flip chip ball grid array (FCBGA) substrates is not focused so far. Herein, non-isothermal differential scanning calorimetry method is used to study the curing behaviors of epoxy-phenolic composite build-up films by three non-isothermal curing kinetics models and model-free curing models and clarify the curing behavior and mechanism. The results showed that the curing reaction process of the epoxy-phenolic composite film is suit for Kamal curing kinetics model. Three model-free curing models were used to calculate the activating energy at different degree of curing and indicated that activating energy is variable during whole curing process. This work will obviously help to promote substrate warpage simulation and prediction in the future.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.