Md Akram Ahmad, Bhubon Chandra Mech, Muzaffar Imam, Satyabrata Jit, N. Aruna Kumari
{"title":"分析漏极工程DG GNR-TFET对模拟/射频性能指标的影响","authors":"Md Akram Ahmad, Bhubon Chandra Mech, Muzaffar Imam, Satyabrata Jit, N. Aruna Kumari","doi":"10.1007/s10825-025-02330-5","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents a novel drain-engineered (DE) double-gate (DG) graphene nanoribbon (GNR) tunnel field-effect transistor (TFET) designed to address the limitations of conventional DG GNR-TFETs. The proposed device introduces a p<sup>+</sup>-n–n configuration, replacing the conventional p<sup>+</sup>-i-n<sup>+</sup> structure by incorporating uniform n-type doping (<i>N</i><sub><i>cd</i></sub>) in both the channel and drain regions. This structural modification enhances the electric field at the source-channel junction, significantly improving ON-state band-to-band tunneling (BTBT) current. The performance of the optimized GNR-TFET is evaluated by varying <i>N</i><sub><i>cd</i></sub>, and the optimal configuration with <i>N</i><sub><i>cd</i></sub> = 2.5 × 10<sup>12</sup> cm<sup>−2</sup> exhibits: a 5.5-order reduction in ambipolar current (<i>I</i><sub><i>AMB</i></sub>) and an improvement in the <i>I</i><sub><i>ON</i></sub><i>/I</i><sub><i>OFF</i></sub> ratio by ~6.88 × 10<sup>4</sup>%. Furthermore, the device demonstrates superior analog and RF performance, including: ~1.4% increase in transconductance (<i>g</i><sub><i>m</i></sub>), a ~189% enhancement in the transconductance generation factor (TGF), and ~46.2% rise in the cut-off frequency (<i>f</i><sub><i>T</i></sub>). These improvements establish the proposed DE-DG GNR-TFET as a high-performance, energy-efficient candidate for next-generation electronic and RF applications. Additionally, the optimal device exhibits superior derived RF performance, achieving enhancements of 52.2% in the transconductance frequency product (TFP), 60.3% in the gain frequency product (GFP), and 216% in the gain transfer frequency product (GTFP). Finally, a linearity analysis is conducted to compare the DE-DG GNR-TFET with the conventional GNR-TFET, further validating the effectiveness of uniform n-type doping.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":"24 3","pages":""},"PeriodicalIF":2.2000,"publicationDate":"2025-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analyzing the impact of drain-engineered DG GNR-TFET on analog/RF performance metrics\",\"authors\":\"Md Akram Ahmad, Bhubon Chandra Mech, Muzaffar Imam, Satyabrata Jit, N. Aruna Kumari\",\"doi\":\"10.1007/s10825-025-02330-5\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper presents a novel drain-engineered (DE) double-gate (DG) graphene nanoribbon (GNR) tunnel field-effect transistor (TFET) designed to address the limitations of conventional DG GNR-TFETs. The proposed device introduces a p<sup>+</sup>-n–n configuration, replacing the conventional p<sup>+</sup>-i-n<sup>+</sup> structure by incorporating uniform n-type doping (<i>N</i><sub><i>cd</i></sub>) in both the channel and drain regions. This structural modification enhances the electric field at the source-channel junction, significantly improving ON-state band-to-band tunneling (BTBT) current. The performance of the optimized GNR-TFET is evaluated by varying <i>N</i><sub><i>cd</i></sub>, and the optimal configuration with <i>N</i><sub><i>cd</i></sub> = 2.5 × 10<sup>12</sup> cm<sup>−2</sup> exhibits: a 5.5-order reduction in ambipolar current (<i>I</i><sub><i>AMB</i></sub>) and an improvement in the <i>I</i><sub><i>ON</i></sub><i>/I</i><sub><i>OFF</i></sub> ratio by ~6.88 × 10<sup>4</sup>%. Furthermore, the device demonstrates superior analog and RF performance, including: ~1.4% increase in transconductance (<i>g</i><sub><i>m</i></sub>), a ~189% enhancement in the transconductance generation factor (TGF), and ~46.2% rise in the cut-off frequency (<i>f</i><sub><i>T</i></sub>). These improvements establish the proposed DE-DG GNR-TFET as a high-performance, energy-efficient candidate for next-generation electronic and RF applications. Additionally, the optimal device exhibits superior derived RF performance, achieving enhancements of 52.2% in the transconductance frequency product (TFP), 60.3% in the gain frequency product (GFP), and 216% in the gain transfer frequency product (GTFP). Finally, a linearity analysis is conducted to compare the DE-DG GNR-TFET with the conventional GNR-TFET, further validating the effectiveness of uniform n-type doping.</p></div>\",\"PeriodicalId\":620,\"journal\":{\"name\":\"Journal of Computational Electronics\",\"volume\":\"24 3\",\"pages\":\"\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2025-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Computational Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10825-025-02330-5\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Computational Electronics","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10825-025-02330-5","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Analyzing the impact of drain-engineered DG GNR-TFET on analog/RF performance metrics
This paper presents a novel drain-engineered (DE) double-gate (DG) graphene nanoribbon (GNR) tunnel field-effect transistor (TFET) designed to address the limitations of conventional DG GNR-TFETs. The proposed device introduces a p+-n–n configuration, replacing the conventional p+-i-n+ structure by incorporating uniform n-type doping (Ncd) in both the channel and drain regions. This structural modification enhances the electric field at the source-channel junction, significantly improving ON-state band-to-band tunneling (BTBT) current. The performance of the optimized GNR-TFET is evaluated by varying Ncd, and the optimal configuration with Ncd = 2.5 × 1012 cm−2 exhibits: a 5.5-order reduction in ambipolar current (IAMB) and an improvement in the ION/IOFF ratio by ~6.88 × 104%. Furthermore, the device demonstrates superior analog and RF performance, including: ~1.4% increase in transconductance (gm), a ~189% enhancement in the transconductance generation factor (TGF), and ~46.2% rise in the cut-off frequency (fT). These improvements establish the proposed DE-DG GNR-TFET as a high-performance, energy-efficient candidate for next-generation electronic and RF applications. Additionally, the optimal device exhibits superior derived RF performance, achieving enhancements of 52.2% in the transconductance frequency product (TFP), 60.3% in the gain frequency product (GFP), and 216% in the gain transfer frequency product (GTFP). Finally, a linearity analysis is conducted to compare the DE-DG GNR-TFET with the conventional GNR-TFET, further validating the effectiveness of uniform n-type doping.
期刊介绍:
he Journal of Computational Electronics brings together research on all aspects of modeling and simulation of modern electronics. This includes optical, electronic, mechanical, and quantum mechanical aspects, as well as research on the underlying mathematical algorithms and computational details. The related areas of energy conversion/storage and of molecular and biological systems, in which the thrust is on the charge transport, electronic, mechanical, and optical properties, are also covered.
In particular, we encourage manuscripts dealing with device simulation; with optical and optoelectronic systems and photonics; with energy storage (e.g. batteries, fuel cells) and harvesting (e.g. photovoltaic), with simulation of circuits, VLSI layout, logic and architecture (based on, for example, CMOS devices, quantum-cellular automata, QBITs, or single-electron transistors); with electromagnetic simulations (such as microwave electronics and components); or with molecular and biological systems. However, in all these cases, the submitted manuscripts should explicitly address the electronic properties of the relevant systems, materials, or devices and/or present novel contributions to the physical models, computational strategies, or numerical algorithms.