{"title":"多比特ΔΣ adc的先入后出数据加权平均技术","authors":"Xing Wang;Chaoyang Xing;Yi Zhong;Lu Jie;Nan Sun","doi":"10.1109/TCSII.2025.3554617","DOIUrl":null,"url":null,"abstract":"Data weighted averaging (DWA) is a frequently used dynamic element matching (DEM) technique to shape the mismatch error in <inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula> ADCs. However, DWA faces a weak noise-shaping capability issue and introduces harmonic distortion under small signal inputs. By contrast, 2nd-order DEM solves these problems but suffers from the high hardware complexity issue. To address these issues, this brief presents a first-in-last-out DWA (FILO-DWA) technique for multi-bit <inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula> ADCs. This technique combines the merits of DWA and 2nd-order DEM. Compared with DWA, it introduces no harmonics and enhances the mismatch shaping ability. In contrast to the 2nd-order vector-quantizer-based (VQ-based) DEM scheme, it achieves more than 10 times hardware cost reduction with negligible shaping ability loss. This technique offers a feasible DWA alternative for high-accuracy <inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula> ADC design.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 5","pages":"703-707"},"PeriodicalIF":4.0000,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"First-In-Last-Out Data Weighted Averaging Technique for Multi-Bit ΔΣ ADCs\",\"authors\":\"Xing Wang;Chaoyang Xing;Yi Zhong;Lu Jie;Nan Sun\",\"doi\":\"10.1109/TCSII.2025.3554617\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Data weighted averaging (DWA) is a frequently used dynamic element matching (DEM) technique to shape the mismatch error in <inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula> ADCs. However, DWA faces a weak noise-shaping capability issue and introduces harmonic distortion under small signal inputs. By contrast, 2nd-order DEM solves these problems but suffers from the high hardware complexity issue. To address these issues, this brief presents a first-in-last-out DWA (FILO-DWA) technique for multi-bit <inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula> ADCs. This technique combines the merits of DWA and 2nd-order DEM. Compared with DWA, it introduces no harmonics and enhances the mismatch shaping ability. In contrast to the 2nd-order vector-quantizer-based (VQ-based) DEM scheme, it achieves more than 10 times hardware cost reduction with negligible shaping ability loss. This technique offers a feasible DWA alternative for high-accuracy <inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula> ADC design.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"72 5\",\"pages\":\"703-707\"},\"PeriodicalIF\":4.0000,\"publicationDate\":\"2025-03-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10938703/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10938703/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
First-In-Last-Out Data Weighted Averaging Technique for Multi-Bit ΔΣ ADCs
Data weighted averaging (DWA) is a frequently used dynamic element matching (DEM) technique to shape the mismatch error in $\Delta \Sigma $ ADCs. However, DWA faces a weak noise-shaping capability issue and introduces harmonic distortion under small signal inputs. By contrast, 2nd-order DEM solves these problems but suffers from the high hardware complexity issue. To address these issues, this brief presents a first-in-last-out DWA (FILO-DWA) technique for multi-bit $\Delta \Sigma $ ADCs. This technique combines the merits of DWA and 2nd-order DEM. Compared with DWA, it introduces no harmonics and enhances the mismatch shaping ability. In contrast to the 2nd-order vector-quantizer-based (VQ-based) DEM scheme, it achieves more than 10 times hardware cost reduction with negligible shaping ability loss. This technique offers a feasible DWA alternative for high-accuracy $\Delta \Sigma $ ADC design.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.