电磁干扰滤波器导体布局问题的数据驱动拓扑设计

IF 2.5 3区 计算机科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Duanyutian Zhou;Katsuya Nomura;Shintaro Yamasaki
{"title":"电磁干扰滤波器导体布局问题的数据驱动拓扑设计","authors":"Duanyutian Zhou;Katsuya Nomura;Shintaro Yamasaki","doi":"10.1109/TEMC.2025.3558260","DOIUrl":null,"url":null,"abstract":"Electromagnetic interference (EMI) filters are used to reduce electromagnetic noise. It is well known that the performance of an EMI filter in reducing electromagnetic noise largely depends on its conductor layout. Therefore, if a conductor layout optimization method with a high degree of freedom is realized, then a drastic performance improvement is expected. Although there are a few design methods based on topology optimization for this purpose, these methods have some difficulties originating from topology optimization. In this article, we, therefore, propose a conductor layout design method for EMI filters on the basis of data-driven topology design (DDTD), which is a high degree of freedom structural design methodology incorporating a deep generative model and data-driven approach. DDTD was proposed to overcome the intrinsic difficulties of topology optimization, and we consider it suitable for the conductor layout design problem of EMI filters. One significant challenge in applying DDTD to the conductor layout design problem is maintaining the topology of the circuit diagram during the solution search. For this purpose, we propose a simple yet efficient constraint. We further provide numerical examples to confirm the usefulness of the proposed method.","PeriodicalId":55012,"journal":{"name":"IEEE Transactions on Electromagnetic Compatibility","volume":"67 3","pages":"872-883"},"PeriodicalIF":2.5000,"publicationDate":"2025-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Data-Driven Topology Design for Conductor Layout Problem of Electromagnetic Interference Filter\",\"authors\":\"Duanyutian Zhou;Katsuya Nomura;Shintaro Yamasaki\",\"doi\":\"10.1109/TEMC.2025.3558260\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electromagnetic interference (EMI) filters are used to reduce electromagnetic noise. It is well known that the performance of an EMI filter in reducing electromagnetic noise largely depends on its conductor layout. Therefore, if a conductor layout optimization method with a high degree of freedom is realized, then a drastic performance improvement is expected. Although there are a few design methods based on topology optimization for this purpose, these methods have some difficulties originating from topology optimization. In this article, we, therefore, propose a conductor layout design method for EMI filters on the basis of data-driven topology design (DDTD), which is a high degree of freedom structural design methodology incorporating a deep generative model and data-driven approach. DDTD was proposed to overcome the intrinsic difficulties of topology optimization, and we consider it suitable for the conductor layout design problem of EMI filters. One significant challenge in applying DDTD to the conductor layout design problem is maintaining the topology of the circuit diagram during the solution search. For this purpose, we propose a simple yet efficient constraint. We further provide numerical examples to confirm the usefulness of the proposed method.\",\"PeriodicalId\":55012,\"journal\":{\"name\":\"IEEE Transactions on Electromagnetic Compatibility\",\"volume\":\"67 3\",\"pages\":\"872-883\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2025-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electromagnetic Compatibility\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10978869/\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electromagnetic Compatibility","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10978869/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

电磁干扰滤波器用于降低电磁噪声。众所周知,EMI滤波器在降低电磁噪声方面的性能在很大程度上取决于其导体布局。因此,如果实现一种具有高自由度的导线布局优化方法,那么将有望大幅提高性能。虽然目前已有一些基于拓扑优化的设计方法,但这些方法都存在一些源于拓扑优化的困难。因此,在本文中,我们提出了一种基于数据驱动拓扑设计(DDTD)的EMI滤波器导体布局设计方法,这是一种结合深度生成模型和数据驱动方法的高自由度结构设计方法。DDTD是为了克服拓扑优化的固有困难而提出的,我们认为它适用于EMI滤波器的导体布局设计问题。将DDTD应用于导体布局设计问题的一个重大挑战是在求解过程中保持电路图的拓扑结构。为此,我们提出了一个简单而有效的约束。通过数值算例验证了所提方法的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Data-Driven Topology Design for Conductor Layout Problem of Electromagnetic Interference Filter
Electromagnetic interference (EMI) filters are used to reduce electromagnetic noise. It is well known that the performance of an EMI filter in reducing electromagnetic noise largely depends on its conductor layout. Therefore, if a conductor layout optimization method with a high degree of freedom is realized, then a drastic performance improvement is expected. Although there are a few design methods based on topology optimization for this purpose, these methods have some difficulties originating from topology optimization. In this article, we, therefore, propose a conductor layout design method for EMI filters on the basis of data-driven topology design (DDTD), which is a high degree of freedom structural design methodology incorporating a deep generative model and data-driven approach. DDTD was proposed to overcome the intrinsic difficulties of topology optimization, and we consider it suitable for the conductor layout design problem of EMI filters. One significant challenge in applying DDTD to the conductor layout design problem is maintaining the topology of the circuit diagram during the solution search. For this purpose, we propose a simple yet efficient constraint. We further provide numerical examples to confirm the usefulness of the proposed method.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
CiteScore
4.80
自引率
19.00%
发文量
235
审稿时长
2.3 months
期刊介绍: IEEE Transactions on Electromagnetic Compatibility publishes original and significant contributions related to all disciplines of electromagnetic compatibility (EMC) and relevant methods to predict, assess and prevent electromagnetic interference (EMI) and increase device/product immunity. The scope of the publication includes, but is not limited to Electromagnetic Environments; Interference Control; EMC and EMI Modeling; High Power Electromagnetics; EMC Standards, Methods of EMC Measurements; Computational Electromagnetics and Signal and Power Integrity, as applied or directly related to Electromagnetic Compatibility problems; Transmission Lines; Electrostatic Discharge and Lightning Effects; EMC in Wireless and Optical Technologies; EMC in Printed Circuit Board and System Design.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信