{"title":"为图像处理应用设计的近似减法器","authors":"P. Divya Parameswari, A.V. Ananthalakshmi","doi":"10.1016/j.vlsi.2025.102425","DOIUrl":null,"url":null,"abstract":"<div><div>Approximate circuits play a vital role in enhancing efficiency and optimizing resource use in modern computing systems. Their benefits are particularly notable in fields that tolerate minor inaccuracies, such as image processing, signal processing, and data mining, where a slight reduction in precision can lead to substantial savings in power and space requirements. This study explores an innovative design for an approximate full subtractor based on the principle of pruning, meticulously implemented using universal two-input NOR gates, valued for their cost efficiency, low power consumption, and compact design. <strong>Existing approximate subtractors have been designed using non-universal basic gates such as XOR, XNOR, NOT, and AND gates. In contrast, the proposed approach utilizes only the universal NOR gate, leading to improved circuit efficiency in terms of area, delay, and power consumption.</strong> Additionally, this work evaluates performance metrics of approximate circuits, demonstrating their effectiveness in various image processing applications involving full subtractors.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102425"},"PeriodicalIF":2.2000,"publicationDate":"2025-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Approximate subtractors designed for image processing applications\",\"authors\":\"P. Divya Parameswari, A.V. Ananthalakshmi\",\"doi\":\"10.1016/j.vlsi.2025.102425\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Approximate circuits play a vital role in enhancing efficiency and optimizing resource use in modern computing systems. Their benefits are particularly notable in fields that tolerate minor inaccuracies, such as image processing, signal processing, and data mining, where a slight reduction in precision can lead to substantial savings in power and space requirements. This study explores an innovative design for an approximate full subtractor based on the principle of pruning, meticulously implemented using universal two-input NOR gates, valued for their cost efficiency, low power consumption, and compact design. <strong>Existing approximate subtractors have been designed using non-universal basic gates such as XOR, XNOR, NOT, and AND gates. In contrast, the proposed approach utilizes only the universal NOR gate, leading to improved circuit efficiency in terms of area, delay, and power consumption.</strong> Additionally, this work evaluates performance metrics of approximate circuits, demonstrating their effectiveness in various image processing applications involving full subtractors.</div></div>\",\"PeriodicalId\":54973,\"journal\":{\"name\":\"Integration-The Vlsi Journal\",\"volume\":\"103 \",\"pages\":\"Article 102425\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2025-04-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Integration-The Vlsi Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167926025000823\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025000823","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Approximate subtractors designed for image processing applications
Approximate circuits play a vital role in enhancing efficiency and optimizing resource use in modern computing systems. Their benefits are particularly notable in fields that tolerate minor inaccuracies, such as image processing, signal processing, and data mining, where a slight reduction in precision can lead to substantial savings in power and space requirements. This study explores an innovative design for an approximate full subtractor based on the principle of pruning, meticulously implemented using universal two-input NOR gates, valued for their cost efficiency, low power consumption, and compact design. Existing approximate subtractors have been designed using non-universal basic gates such as XOR, XNOR, NOT, and AND gates. In contrast, the proposed approach utilizes only the universal NOR gate, leading to improved circuit efficiency in terms of area, delay, and power consumption. Additionally, this work evaluates performance metrics of approximate circuits, demonstrating their effectiveness in various image processing applications involving full subtractors.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.