串行实值快速傅里叶变换的面积高效管道结构

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2024-11-25 DOI:10.1109/TVLSI.2024.3496922

Kun Li;Hongji Fang;Zhenguo Ma;Feng Yu;Bo Zhang;Qianjian Xing

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引用次数: 0

摘要

本文介绍了一种新的流水线结构，用于计算串行格式的实际输入信号的快速傅里叶变换。这种结构通过在蝴蝶和旋转器结构之间共享加法器显着提高了资源效率。此外，提出了一种新的n点基数-2串行实值FFT （RFFT）数据管理方法，该方法不仅简化了处理单元之间的数据重排序电路，而且实现了自然有序的数据输出。在现场可编程门阵列（FPGA）上实现了实值1024点FFT。与典型的实值串行换向器（RSC） FFT架构相比，该架构实现了实质性的改进，包括查找表（lut）数量减少10.3%，触发器（ff）数量减少12.5%。

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Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform

This brief presents a novel pipeline architecture designed to compute the fast Fourier transform (FFT) on real input signals in a serial format. This architecture significantly improves resource efficiency by sharing adders between butterfly and rotator structures. In addition, a novel data management approach for N-point radix-2 serial real-valued FFT (RFFT) has been proposed, which not only simplifies the data reordering circuit between processing elements (PEs) but also achieves natural order data output. The real-valued 1024-point FFT has been implemented on a field-programmable gate array (FPGA). Compared with typical real-valued serial commutator (RSC) FFT architecture, the proposed architecture achieves substantial improvement, including a reduction of 10.3% in the number of lookup tables (LUTs) and 12.5% in flip-flops (FFs).

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.