一种提高模拟/混合信号电路交替测试可靠性和准确性的模型分割方法

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Jiaming Zhao;Naixin Zhou;Shibo Chen;Yijiu Zhao;Guibing Zhu
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引用次数: 0

摘要

基于机器学习的模拟/混合信号集成电路(ic)替代测试在过去十年中得到了广泛的研究,它具有简化测试设备和降低测试成本的优点。然而,由于可靠性和准确性较低,替代测试技术在工业上很难采用。本文提出了一种模型分割方法(MDSP方法)来提高交替检验的可靠性和准确性。基于机器学习的估计模型被“分裂”成两个具有“互补”性能的模型(一个“正”模型和一个“负”模型)。“正”模型生成的估计不小于标签值,而“负”模型输出的估计不大于标签值。两个模型之间差异过大的估计被识别为误差较大的可疑估计,并被过滤掉。将“互补”模型的其余结果取平均值以生成最终估计。通过比较两种模型的估计,有效地滤除了误差较大的估计,并通过融合两种估计的结果显著提高了估计精度。利用商用模数转换器和运算放大器(OP)的数据对MDSP方法进行了研究。结果表明,该方法可显著提高测试的可靠性和准确性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Model Splitting Approach to Improve Reliability and Accuracy for Alternate Test of Analog/Mixed-Signal Circuits
Machine learning-based alternate test of analog/mixed-signal integrated circuits (ICs) has been widely studied in the last decade, which has the benefits of simplifying test equipment and decreasing test costs. However, due to low reliability and accuracy, it is hard to adopt the alternate test technique in the industry. In this article, a model splitting approach (MDSP approach) is proposed to improve the reliability and accuracy of the alternate test. The machine learning-based estimation model is “split” into two models with “complementary” performance (a “positive” model and a “negative” model). The “positive” model generates estimations that are no smaller than label values, while the “negative” model outputs estimations that are no larger than label values. Estimations with excessive differences between two models are identified as suspected estimations with large errors and filtered out. The rest results of “complementary” models are averaged to generate the final estimations. By comparing estimations of two models, the estimations with large error are filtered out effectively, and the estimation accuracy is improved significantly by fusing the results of two estimators. The MDSP approach is investigated with data from the commercial analog-to-digital converter and operational amplifier (OP). Results demonstrated that the proposed approach can improve test reliability and accuracy significantly.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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