一种适用于所有电容性负载的高稳定性两级CMOS放大器

IF 2.8 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-02-05 DOI:10.1109/TVLSI.2025.3532362

Germano Nicollini;Alessandro Bertolini

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引用次数: 0

摘要

本文介绍了一种全差分两级CMOS放大器的概念、设计和实现，即对任何容性负载值都无条件稳定。这只是通过将输出级电流的缩放副本发送到放大器虚拟地来实现，以便在环路增益中创建左半平面（LHP）零，从而在所有过程、电压和温度（PVT）条件下抵消或跟踪输出极。因此，从稳定性的角度来看，放大器的行为类似于单极OTA。从现有的两级增益可编程放大器开始，采用0.18- $\mu $ m双极cmos - dmos （BCD）工艺设计，仅能驱动10 pF而不会遇到稳定性问题，已经添加了一个简单的电路，以将稳定性扩展到任何容性负载值。基于无载闭环放大器输出阻抗的频率特性，提出了一种有趣而不寻常的方法来进一步验证该解的无条件稳定性。测量显示在任何负载条件下都具有高度的稳定性。在采用0.18 ~ $\mu $ m的BCD技术中，在5v电源的情况下，额外电路的硅面积和电流消耗分别仅为0.0004 mm2和$2~ $ mu $ A。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Two-Stage CMOS Amplifier With High Degree of Stability for All Capacitive Loads

This article presents the conception, design, and realization of a fully differential two-stage CMOS amplifier, that is, unconditionally stable for any value of the capacitive load. This is simply achieved by sending a scaled replica of the output stage current to the amplifier virtual ground in order to create a left half-plane (LHP) zero in the loop gain that either cancels or tracks the output pole in all process, voltage, and temperature (PVT) conditions. Consequently, from a stability point of view, the amplifier behavior resembles that of a single-pole OTA. Starting from an existing two-stage gain-programmable amplifier, designed in a 0.18-

$\mu $

m bipolar-CMOS-DMOS (BCD) process that was able to drive only 10 pF without encountering into stability issues, a simple circuit has been added to extend the stability to any capacitive load value. An interesting and unusual method, based on the frequency behavior of the unloaded closed-loop amplifier output impedance, has been introduced to further verify the unconditional stability of this solution. Measurements show a high degree of stability in any load conditions. In the used 0.18-

$\mu $

m BCD technology, silicon area and current consumption of the extra circuit are only 0.0004 mm2 and

$2~\mu $

A, respectively, with a 5-V power supply.

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来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.