CSA-CiM:用可配置感测放大器增强多功能内存计算

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yuxiao Jiang;Kai Ni;Thomas Kämpfe;Cheng Zhuo;Zheyu Yan;Xunzhao Yin
{"title":"CSA-CiM:用可配置感测放大器增强多功能内存计算","authors":"Yuxiao Jiang;Kai Ni;Thomas Kämpfe;Cheng Zhuo;Zheyu Yan;Xunzhao Yin","doi":"10.1109/TCAD.2024.3506864","DOIUrl":null,"url":null,"abstract":"Computing-in-memory (CiM) effectively alleviates the memory wall problem faced by traditional von Neumann architectures when handling data-intensive applications. Most CiM arrays employ dedicated sense amplifiers (SAs) to perform specific functions, and prior configurable CiM arrays achieve multifunctionality by stacking multiple SAs with corresponding functions. However, the independent nature of these SAs, particularly the analog-to-digital converter (ADC), results in excessive energy and area consumption. In this article, we propose a configurable multifunctional ferroelectric field effect transistor (FeFET)-based CiM array design, including configurable peripheral circuit with corresponding multifunctionalities and reusable SA components, to reduce energy consumption and latency. The array cells perform logical AND and XNOR operations, and the proposed SA can be configured to operate in either ADC or winner-take-all (WTA) modes, thereby enabling the array to implement both multiplication-accumulation (MAC) and associative search operations. Instead of operating independently, the WTA component within the SA participates as a flash stage in successive approximation register (SAR) conversions in ADC mode, thus enhancing the WTA utilization, energy efficiency and compactness. By integrating the multifunctional CiM array and the configurable SA, our design supports MAC, Hamming-distance computation (HDC), and nearest neighbor search (NNS) operations within the same structure. Compared to existing works, our design achieves energy efficiency improvements of <inline-formula> <tex-math>$7.2\\times $ </tex-math></inline-formula> for MAC, <inline-formula> <tex-math>$2.9\\times $ </tex-math></inline-formula> for HDC, and EDP improvement of <inline-formula> <tex-math>$6.4\\times $ </tex-math></inline-formula> for NNS, respectively.","PeriodicalId":13251,"journal":{"name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","volume":"44 5","pages":"1869-1873"},"PeriodicalIF":2.7000,"publicationDate":"2024-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CSA-CiM: Enhancing Multifunctional Computing-in-Memory With Configurable Sense Amplifiers\",\"authors\":\"Yuxiao Jiang;Kai Ni;Thomas Kämpfe;Cheng Zhuo;Zheyu Yan;Xunzhao Yin\",\"doi\":\"10.1109/TCAD.2024.3506864\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Computing-in-memory (CiM) effectively alleviates the memory wall problem faced by traditional von Neumann architectures when handling data-intensive applications. Most CiM arrays employ dedicated sense amplifiers (SAs) to perform specific functions, and prior configurable CiM arrays achieve multifunctionality by stacking multiple SAs with corresponding functions. However, the independent nature of these SAs, particularly the analog-to-digital converter (ADC), results in excessive energy and area consumption. In this article, we propose a configurable multifunctional ferroelectric field effect transistor (FeFET)-based CiM array design, including configurable peripheral circuit with corresponding multifunctionalities and reusable SA components, to reduce energy consumption and latency. The array cells perform logical AND and XNOR operations, and the proposed SA can be configured to operate in either ADC or winner-take-all (WTA) modes, thereby enabling the array to implement both multiplication-accumulation (MAC) and associative search operations. Instead of operating independently, the WTA component within the SA participates as a flash stage in successive approximation register (SAR) conversions in ADC mode, thus enhancing the WTA utilization, energy efficiency and compactness. By integrating the multifunctional CiM array and the configurable SA, our design supports MAC, Hamming-distance computation (HDC), and nearest neighbor search (NNS) operations within the same structure. Compared to existing works, our design achieves energy efficiency improvements of <inline-formula> <tex-math>$7.2\\\\times $ </tex-math></inline-formula> for MAC, <inline-formula> <tex-math>$2.9\\\\times $ </tex-math></inline-formula> for HDC, and EDP improvement of <inline-formula> <tex-math>$6.4\\\\times $ </tex-math></inline-formula> for NNS, respectively.\",\"PeriodicalId\":13251,\"journal\":{\"name\":\"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\",\"volume\":\"44 5\",\"pages\":\"1869-1873\"},\"PeriodicalIF\":2.7000,\"publicationDate\":\"2024-11-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10767728/\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10767728/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

摘要

内存计算(CiM)有效地缓解了传统冯·诺依曼架构在处理数据密集型应用时所面临的内存墙问题。大多数CiM阵列采用专用的感测放大器(sa)来执行特定的功能,而先前可配置的CiM阵列通过堆叠多个具有相应功能的sa来实现多功能。然而,这些sa的独立性,特别是模数转换器(ADC),导致过多的能量和面积消耗。在本文中,我们提出了一种基于可配置的多功能铁电场效应晶体管(FeFET)的CiM阵列设计,包括具有相应多功能的可配置外围电路和可重复使用的SA组件,以降低能耗和延迟。阵列单元执行逻辑AND和XNOR操作,建议的SA可以配置为在ADC或赢家通吃(WTA)模式下操作,从而使阵列能够实现乘法累加(MAC)和关联搜索操作。在ADC模式下,SA内的WTA组件不是独立工作,而是作为一个闪存阶段参与逐次逼近寄存器(SAR)转换,从而提高了WTA的利用率、能效和紧凑性。通过集成多功能CiM阵列和可配置的SA,我们的设计在同一结构内支持MAC、汉明距离计算(HDC)和最近邻搜索(NNS)操作。与现有的工作相比,我们的设计实现了MAC的能源效率提高7.2美元,HDC的能源效率提高2.9美元,NNS的能源效率提高6.4美元。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CSA-CiM: Enhancing Multifunctional Computing-in-Memory With Configurable Sense Amplifiers
Computing-in-memory (CiM) effectively alleviates the memory wall problem faced by traditional von Neumann architectures when handling data-intensive applications. Most CiM arrays employ dedicated sense amplifiers (SAs) to perform specific functions, and prior configurable CiM arrays achieve multifunctionality by stacking multiple SAs with corresponding functions. However, the independent nature of these SAs, particularly the analog-to-digital converter (ADC), results in excessive energy and area consumption. In this article, we propose a configurable multifunctional ferroelectric field effect transistor (FeFET)-based CiM array design, including configurable peripheral circuit with corresponding multifunctionalities and reusable SA components, to reduce energy consumption and latency. The array cells perform logical AND and XNOR operations, and the proposed SA can be configured to operate in either ADC or winner-take-all (WTA) modes, thereby enabling the array to implement both multiplication-accumulation (MAC) and associative search operations. Instead of operating independently, the WTA component within the SA participates as a flash stage in successive approximation register (SAR) conversions in ADC mode, thus enhancing the WTA utilization, energy efficiency and compactness. By integrating the multifunctional CiM array and the configurable SA, our design supports MAC, Hamming-distance computation (HDC), and nearest neighbor search (NNS) operations within the same structure. Compared to existing works, our design achieves energy efficiency improvements of $7.2\times $ for MAC, $2.9\times $ for HDC, and EDP improvement of $6.4\times $ for NNS, respectively.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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