重新审视作为离散SiC mosfet TSEP的导通状态电阻:迈向在电路方法的步骤

IF 5 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Enrico Panciroli;Alex Musetti;Alessandro Soldati
{"title":"重新审视作为离散SiC mosfet TSEP的导通状态电阻:迈向在电路方法的步骤","authors":"Enrico Panciroli;Alex Musetti;Alessandro Soldati","doi":"10.1109/OJPEL.2025.3560768","DOIUrl":null,"url":null,"abstract":"The knowledge of device junction temperature in real time allows to maximize the power density of power electronics converters, by means of active derating and dynamic overloading. Since junction temperature cannot be measured directly without altering the device, temperature-sensitive electric parameters (TSEPs) are used to indirectly estimate it. The dispersion of the device parameters affecting TSEPs requires their characterization on a per-device basis, thus limiting the adoption in commercial converters. In this paper, the on-state resistance TSEP is applied to silicon-carbide MOSFETs and a novel approach for the extraction of the characteristic curves is presented. Particularly, several methodologies are introduced to avoid putting the converter in a temperature-controlled environment, exploiting self heating and a modification of the cooling system. Moreover, self heating is induced by means of the novel controlled shoot-through (CST) technique, which does not need a load connected to the converter output. The TSEP curves are then characterized by using repetitive sawtooth current pulses on an inductive load, at different device temperatures. A cork cap is proposed to thermally insulate the device under test (DUT), blocking unwanted thermal paths, improving accuracy and minimizing the time needed for the characterization procedure. Finally, various modeling techniques are evaluated to identify the most suitable temperature estimation model, simplifying the calibration by reducing the number of acquired points while maintaining the highest possible accuracy. All these elements make the proposed methodology suitable for end-of-line testing in a production environment, thus enabling the individual characterization of each device of the power converter. The experimental validation of the results is performed against reference laboratory techniques, showing an overall RMS error below <inline-formula><tex-math>$1 \\,\\mathrm{^{\\circ }C}$</tex-math></inline-formula> when using the most complete estimation model, and less than <inline-formula><tex-math>$2 \\,\\mathrm{^{\\circ }C}$</tex-math></inline-formula> when employing a simplified reduced-order model.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"6 ","pages":"681-692"},"PeriodicalIF":5.0000,"publicationDate":"2025-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964525","citationCount":"0","resultStr":"{\"title\":\"Revisiting On-State Resistance as TSEP for Discrete SiC MOSFETs: Steps Towards the In-Circuit Approach\",\"authors\":\"Enrico Panciroli;Alex Musetti;Alessandro Soldati\",\"doi\":\"10.1109/OJPEL.2025.3560768\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The knowledge of device junction temperature in real time allows to maximize the power density of power electronics converters, by means of active derating and dynamic overloading. Since junction temperature cannot be measured directly without altering the device, temperature-sensitive electric parameters (TSEPs) are used to indirectly estimate it. The dispersion of the device parameters affecting TSEPs requires their characterization on a per-device basis, thus limiting the adoption in commercial converters. In this paper, the on-state resistance TSEP is applied to silicon-carbide MOSFETs and a novel approach for the extraction of the characteristic curves is presented. Particularly, several methodologies are introduced to avoid putting the converter in a temperature-controlled environment, exploiting self heating and a modification of the cooling system. Moreover, self heating is induced by means of the novel controlled shoot-through (CST) technique, which does not need a load connected to the converter output. The TSEP curves are then characterized by using repetitive sawtooth current pulses on an inductive load, at different device temperatures. A cork cap is proposed to thermally insulate the device under test (DUT), blocking unwanted thermal paths, improving accuracy and minimizing the time needed for the characterization procedure. Finally, various modeling techniques are evaluated to identify the most suitable temperature estimation model, simplifying the calibration by reducing the number of acquired points while maintaining the highest possible accuracy. All these elements make the proposed methodology suitable for end-of-line testing in a production environment, thus enabling the individual characterization of each device of the power converter. The experimental validation of the results is performed against reference laboratory techniques, showing an overall RMS error below <inline-formula><tex-math>$1 \\\\,\\\\mathrm{^{\\\\circ }C}$</tex-math></inline-formula> when using the most complete estimation model, and less than <inline-formula><tex-math>$2 \\\\,\\\\mathrm{^{\\\\circ }C}$</tex-math></inline-formula> when employing a simplified reduced-order model.\",\"PeriodicalId\":93182,\"journal\":{\"name\":\"IEEE open journal of power electronics\",\"volume\":\"6 \",\"pages\":\"681-692\"},\"PeriodicalIF\":5.0000,\"publicationDate\":\"2025-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10964525\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE open journal of power electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10964525/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of power electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10964525/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

器件结温的实时知识允许最大限度地提高功率电子转换器的功率密度,通过主动降额和动态过载的手段。由于结温不能在不改变器件的情况下直接测量,因此使用温度敏感电参数(tsps)来间接估计结温。影响tsps的器件参数的分散需要在每个器件的基础上进行表征,从而限制了在商业转换器中的采用。本文将导通电阻TSEP应用于碳化硅mosfet,提出了一种提取特性曲线的新方法。特别地,介绍了几种方法来避免将转炉置于温度控制的环境中,利用自加热和冷却系统的修改。此外,通过新型的可控穿透(CST)技术可以诱导自加热,该技术不需要连接到变换器输出端的负载。然后,在不同的器件温度下,通过在感应负载上使用重复锯齿电流脉冲来表征TSEP曲线。建议使用软木盖隔热被测设备(DUT),阻断不需要的热路径,提高准确性并最大限度地减少表征过程所需的时间。最后,评估了各种建模技术,以确定最合适的温度估计模型,通过减少获取点的数量来简化校准,同时保持尽可能高的精度。所有这些因素使所提出的方法适用于生产环境中的生产线末端测试,从而能够对功率转换器的每个器件进行单独的表征。通过参考实验室技术对结果进行了实验验证,结果表明,当使用最完整的估计模型时,总体RMS误差小于$1 \,\ mathm {^{\circ}C}$,而当使用简化的降阶模型时,RMS误差小于$2 \,\ mathm {^{\circ}C}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Revisiting On-State Resistance as TSEP for Discrete SiC MOSFETs: Steps Towards the In-Circuit Approach
The knowledge of device junction temperature in real time allows to maximize the power density of power electronics converters, by means of active derating and dynamic overloading. Since junction temperature cannot be measured directly without altering the device, temperature-sensitive electric parameters (TSEPs) are used to indirectly estimate it. The dispersion of the device parameters affecting TSEPs requires their characterization on a per-device basis, thus limiting the adoption in commercial converters. In this paper, the on-state resistance TSEP is applied to silicon-carbide MOSFETs and a novel approach for the extraction of the characteristic curves is presented. Particularly, several methodologies are introduced to avoid putting the converter in a temperature-controlled environment, exploiting self heating and a modification of the cooling system. Moreover, self heating is induced by means of the novel controlled shoot-through (CST) technique, which does not need a load connected to the converter output. The TSEP curves are then characterized by using repetitive sawtooth current pulses on an inductive load, at different device temperatures. A cork cap is proposed to thermally insulate the device under test (DUT), blocking unwanted thermal paths, improving accuracy and minimizing the time needed for the characterization procedure. Finally, various modeling techniques are evaluated to identify the most suitable temperature estimation model, simplifying the calibration by reducing the number of acquired points while maintaining the highest possible accuracy. All these elements make the proposed methodology suitable for end-of-line testing in a production environment, thus enabling the individual characterization of each device of the power converter. The experimental validation of the results is performed against reference laboratory techniques, showing an overall RMS error below $1 \,\mathrm{^{\circ }C}$ when using the most complete estimation model, and less than $2 \,\mathrm{^{\circ }C}$ when employing a simplified reduced-order model.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
CiteScore
8.60
自引率
0.00%
发文量
0
审稿时长
8 weeks
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信