{"title":"改进故障覆盖率的功能压缩直接搜索程序","authors":"Irith Pomeranz","doi":"10.1109/TCAD.2024.3499898","DOIUrl":null,"url":null,"abstract":"An important component of ensuring system reliability is the application of functional tests. Functional test sequences are available after simulation-based design verification, they can be extracted from application programs, or generated for target faults. Functional test sequences can be long, and test compaction at the gate-level is important for reducing the test application time without losing fault coverage. Experimental results with several test compaction procedures indicate that test compaction sometimes leads accidentally to an increased fault coverage. Such an increase was observed recently with a gate-level test compaction procedure that has the unique property of restoring functional operation conditions after parts of a sequence are eliminated. The contribution of this article is to use this property of the test compaction procedure to increase the fault coverage directly, in a targeted manner, while compacting the sequence. Experimental results for benchmark circuits in an academic environment demonstrate a significant fault coverage increase combined with significant test compaction.","PeriodicalId":13251,"journal":{"name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","volume":"44 5","pages":"1981-1990"},"PeriodicalIF":2.7000,"publicationDate":"2024-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Direct Search Procedure for Functional Compaction With Improved Fault Coverage\",\"authors\":\"Irith Pomeranz\",\"doi\":\"10.1109/TCAD.2024.3499898\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An important component of ensuring system reliability is the application of functional tests. Functional test sequences are available after simulation-based design verification, they can be extracted from application programs, or generated for target faults. Functional test sequences can be long, and test compaction at the gate-level is important for reducing the test application time without losing fault coverage. Experimental results with several test compaction procedures indicate that test compaction sometimes leads accidentally to an increased fault coverage. Such an increase was observed recently with a gate-level test compaction procedure that has the unique property of restoring functional operation conditions after parts of a sequence are eliminated. The contribution of this article is to use this property of the test compaction procedure to increase the fault coverage directly, in a targeted manner, while compacting the sequence. Experimental results for benchmark circuits in an academic environment demonstrate a significant fault coverage increase combined with significant test compaction.\",\"PeriodicalId\":13251,\"journal\":{\"name\":\"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\",\"volume\":\"44 5\",\"pages\":\"1981-1990\"},\"PeriodicalIF\":2.7000,\"publicationDate\":\"2024-11-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10753496/\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10753496/","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Direct Search Procedure for Functional Compaction With Improved Fault Coverage
An important component of ensuring system reliability is the application of functional tests. Functional test sequences are available after simulation-based design verification, they can be extracted from application programs, or generated for target faults. Functional test sequences can be long, and test compaction at the gate-level is important for reducing the test application time without losing fault coverage. Experimental results with several test compaction procedures indicate that test compaction sometimes leads accidentally to an increased fault coverage. Such an increase was observed recently with a gate-level test compaction procedure that has the unique property of restoring functional operation conditions after parts of a sequence are eliminated. The contribution of this article is to use this property of the test compaction procedure to increase the fault coverage directly, in a targeted manner, while compacting the sequence. Experimental results for benchmark circuits in an academic environment demonstrate a significant fault coverage increase combined with significant test compaction.
期刊介绍:
The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.