改进故障覆盖率的功能压缩直接搜索程序

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Irith Pomeranz
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引用次数: 0

摘要

确保系统可靠性的一个重要组成部分是功能测试的应用。功能测试序列是在基于仿真的设计验证后可用的,它们可以从应用程序中提取,也可以针对目标故障生成。功能测试序列可能很长,并且闸级的测试压缩对于在不丢失故障覆盖率的情况下减少测试应用时间非常重要。几种测试压实过程的实验结果表明,测试压实有时会意外地导致故障覆盖率的增加。这种增加最近被观察到与门级测试压实程序,具有恢复功能操作条件的独特性质后,部分序列被消除。本文的贡献是利用测试压缩过程的这一特性,在压缩序列的同时,以有针对性的方式直接增加故障覆盖率。在学术环境下对基准电路的实验结果表明,故障覆盖率显著提高,测试压缩效果显著。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Direct Search Procedure for Functional Compaction With Improved Fault Coverage
An important component of ensuring system reliability is the application of functional tests. Functional test sequences are available after simulation-based design verification, they can be extracted from application programs, or generated for target faults. Functional test sequences can be long, and test compaction at the gate-level is important for reducing the test application time without losing fault coverage. Experimental results with several test compaction procedures indicate that test compaction sometimes leads accidentally to an increased fault coverage. Such an increase was observed recently with a gate-level test compaction procedure that has the unique property of restoring functional operation conditions after parts of a sequence are eliminated. The contribution of this article is to use this property of the test compaction procedure to increase the fault coverage directly, in a targeted manner, while compacting the sequence. Experimental results for benchmark circuits in an academic environment demonstrate a significant fault coverage increase combined with significant test compaction.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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