Analog Predistortion Linearizer With Controllable Gain Expansion and Low AM/PM Conversion

This letter introduces a novel analog predistorter (APD) design by using Schottky diodes and simple transmission lines only. The proposed linearizer exhibits controllable gain expansion profile (by adjusting bias voltage) and reduced AM/PM distortion (by inserting compensation capacitor). It also features high return loss and negligible power consumption. For verification, both simulated and measured AM/AM and AM/PM behaviors of the proposed APD are shown. Furthermore, the linearization of a class-AB power amplifier (PA) is evaluated using a 10-MHz 64-QAM LTE signal with a peak-to-average power ratio (PAPR) of 6.6 dB. At 6.9-dB OBO, the measured adjacent channel power ratio (ACPR) is found to improve from −31.9 dBc (without APD) to −40.5 dBc (with APD).