A novel 8T2R NVSRAM with synchronizing write and store function

A novel 8T2R non-volatile static randomized memory (NVSRAM) is proposed to meet accidental power-down situations by storing data into two memristors simultaneously with writing the node voltages. By shortening the writing and storing of previous NVSRAMs into one-step, the hold-on mode can be omitted and the energy consumption decreased since it is necessary to use additional control signals for inserting memristors for storage into the circuit. The initialization of memristors before writing can also be skipped. Only the power supply is needed to be recovered, and the restoration of node voltages can be achieved normally without the pre-charge of other ports. Compared with existing NVSRAMs, 8T2R NVSRAM greatly improves the circuit efficiency and reduces the power consumption by minimizing the operation steps and the required external excitation. An extra node voltage is added as a reference in 8T2R, which increases the reliability of the storage along with both memristor states. Simulations demonstrated that the proposed 8T2R can balance read margin and write margin well and has good robustness.