一个高级可编程和定制的芯片上助听器系统集成在一个研究助听器原型。

Jens Karrenbauer;Sven Schönewald;Simon Klein;Frederik Kautz;Kamil Adiloğlu;Claudia Kretzschmar;Tobias Bruns;Hans-Martin Bluethgen;Meinolf Blawat;Jens Benndorf;Holger Blume
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引用次数: 0

摘要

听力损失是最常见的感官缺陷之一。具有适应性个性化信号处理的助听器可以进一步改善受影响者的社交生活。为了研究可能的改进程度,需要高级可编程,低功耗和便携式耳后(BTE)研究平台来进行现实世界中的研究,而不仅仅是在实验室中。然而,由于助听器市场非常有限,而且据我们所知,目前还没有BTE尺寸的研究平台,因此本文提出了一个BTE尺寸的全嵌入式助听器原型作为贡献之一。设备集成了蓝牙BLE (Bluetooth Low Energy)和NFMI (Near Field Magnetic Induction)等无线接口。尽管它的体积很小,重量只有5克,但它可以使用最先进的听力算法进行长达9小时的研究。作为在执行这些计算要求很高的算法时实现低功耗的关键组件,本文提出了一种新设计的智能助听器处理器(SmartHeaP)片上系统(SoC)。它是一种混合信号和专用集成电路(ASIC),具有自适应体偏置(ABB)单元,采用22nm全耗尽绝缘体上硅(FD-SOI)技术制造。此外,SoC集成了两个使用虚拟原型方法设计的特定应用指令集处理器(asip)。SoC是高级可编程的,专为助听器应用而定制,能够运行,例如,功耗为1.45 mW @ 5 MHz的双耳波束形成器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
SmartHeaP- A High-Level Programmable and Customized Hearing Aid System on Chip Integrated in a Research Hearing Aid Prototype
Hearing loss is one of the most common sensory deficiencies. Hearing aids with adaptable personalized signal processing can further enhance the social lives of those affected. To investigate the degree of possible improvements, high-level programmable, low-power, and portable behind-the-ear (BTE) research platforms are needed to conduct studies in the real world and not just in the laboratory. However, as the hearing aid market is very restrictive and, to the best of our knowledge, no research platforms in BTE size are available, this paper presents a fully embedded hearing aid prototype in a BTE form factor as one of the contributions. The device integrates wireless interfaces such as Bluetooth Low Energy (BLE) and Near Field Magnetic Induction (NFMI). Despite its small size and weight of only 5 grams, it can be used for studies lasting up to nine hours with state-of-the-art hearing algorithms. As a key component to achieve this low power consumption while executing these computationally demanding algorithms, this paper presents a newly designed Smart Hearing Aid Processor (SmartHeaP) System on Chip (SoC). It is a mixed-signal and application-specific integrated circuit (ASIC) with an adaptive body bias (ABB) unit fabricated in 22nm fully-depleted silicon-on-insulator (FD-SOI) technology. Furthermore, the SoC integrates two application-specific instruction set processors (ASIPs) designed using virtual prototyping approaches. The SoC is high-level programmable and tailored to hearing aid applications, capable of running, e.g., a binaural beamformer with a power consumption of 1.45 mW $\boldsymbol{@}$ 5 MHz.
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