Fatih Tiryakioğlu , Ahmet Unutulmaz , İhsan Çiçek , Ali Tangel
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A novel low-hardware-cost scan chain architecture resilient to scanSAT attack
Logic locking serves to protect a hardware design from an untrusted fabrication facility. A manufacturer may bypass the protection by performing a SAT attack by making use of the scan chain structure, which was designed to increase the testability of ICs. One way to prevent such attacks is to encrypt the scan chain using a cryptographic algorithm. However, adding dedicated encryption modules into the IC increases the cost. In this study, we reduced this cost by reusing the scan chain structure to be able to implement a cryptographic algorithm, the Trivium algorithm. Our implementation allows production, functional and mission mode field tests to be performed by an unreliable tester.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.