{"title":"一种适用于物联网(IoT)设备的太阳能光伏电池低压LDO设计","authors":"Subhranshu Sekhar Dash, Subinoy Roy, Kaushik Bhattacharyya","doi":"10.1007/s10470-025-02381-5","DOIUrl":null,"url":null,"abstract":"<div><p>This article explores the design and simulation of a low-voltage, low-dropout (LDO) voltage regulator for efficient solar photovoltaic (PV) cell operation. This model stands out for its contribution to a sustainable future. Compared to conventional LDOs, it eliminates the need for external power sources, potentially reducing running costs in the long term. The design prioritizes low dropout voltage to minimize wasted energy, addressing the limitations of traditional LDO when powered by a fluctuating solar PV cell output. A solar PV cell model provided a variable input, achieving successful LDO operation with a regulated output of around 0.9 V from a 1 V input (the output of the electrical equivalent circuit of a solar PV cell). The design achieved a dropout voltage of around 0.1 V and a calculated efficiency of 79.2%. Frequency response analysis indicated excellent operational stability with a high phase margin (85 °) with the d.c. gain of more than 50 dB.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"123 3","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of a low voltage LDO powered by solar photovoltaic cell suitable for internet of things (IoT) devices\",\"authors\":\"Subhranshu Sekhar Dash, Subinoy Roy, Kaushik Bhattacharyya\",\"doi\":\"10.1007/s10470-025-02381-5\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This article explores the design and simulation of a low-voltage, low-dropout (LDO) voltage regulator for efficient solar photovoltaic (PV) cell operation. This model stands out for its contribution to a sustainable future. Compared to conventional LDOs, it eliminates the need for external power sources, potentially reducing running costs in the long term. The design prioritizes low dropout voltage to minimize wasted energy, addressing the limitations of traditional LDO when powered by a fluctuating solar PV cell output. A solar PV cell model provided a variable input, achieving successful LDO operation with a regulated output of around 0.9 V from a 1 V input (the output of the electrical equivalent circuit of a solar PV cell). The design achieved a dropout voltage of around 0.1 V and a calculated efficiency of 79.2%. Frequency response analysis indicated excellent operational stability with a high phase margin (85 °) with the d.c. gain of more than 50 dB.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":\"123 3\",\"pages\":\"\"},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2025-04-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-025-02381-5\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02381-5","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Design of a low voltage LDO powered by solar photovoltaic cell suitable for internet of things (IoT) devices
This article explores the design and simulation of a low-voltage, low-dropout (LDO) voltage regulator for efficient solar photovoltaic (PV) cell operation. This model stands out for its contribution to a sustainable future. Compared to conventional LDOs, it eliminates the need for external power sources, potentially reducing running costs in the long term. The design prioritizes low dropout voltage to minimize wasted energy, addressing the limitations of traditional LDO when powered by a fluctuating solar PV cell output. A solar PV cell model provided a variable input, achieving successful LDO operation with a regulated output of around 0.9 V from a 1 V input (the output of the electrical equivalent circuit of a solar PV cell). The design achieved a dropout voltage of around 0.1 V and a calculated efficiency of 79.2%. Frequency response analysis indicated excellent operational stability with a high phase margin (85 °) with the d.c. gain of more than 50 dB.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.