基于SSA的QFN焊点弯曲-扭转耦合应力分析与优化

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Jisheng Wei, Chunyue Huang, Chao Gao, Gui Wang
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引用次数: 0

摘要

建立了QFN (Quad Flat No-Lead Package)焊点的三维有限元模型,进行了弯曲-扭转耦合加载下的应力-应变分析。通过弯曲-扭转耦合应变测量实验验证了有限元模拟的准确性。采用单变量分析和相关分析方法,分析了焊片长度、焊片宽度、焊点间距高度和PCB厚度对弯曲-扭转耦合应力-应变行为的影响。为了减小应力,采用响应面-麻雀搜索算法(SSA)对这些参数进行优化。结果表明,焊盘长度呈弱正相关,焊盘宽度和对峙高度呈强负相关,而PCB厚度呈强正相关。最佳参数为焊片长度0.66 mm,焊片宽度0.25 mm,焊点高度0.09 mm, PCB厚度1.2 mm,最大应力降低10.8 MPa。研究结果为减小QFN焊点的弯扭耦合应力提供了理论指导。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Stress analysis and optimization of QFN solder joints under bending-torsion coupled conditions based on the SSA
A 3D finite element model of QFN (Quad Flat No-Lead Package) solder joints was established for stress–strain analysis under bending-torsion coupled loading. The accuracy of the finite element simulation was validated through bending-torsion coupled strain measurement experiments. The effects of pad length, pad width, solder joint standoff height, and PCB (Printed Circuit Board) thickness on bending-torsion coupled stress–strain behavior were analyzed using univariate and correlation analysis. To minimize stress, these parameters were optimized using the response surface-Sparrow Search Algorithm (SSA). Results show a weakly positive correlation for pad length, strong negative correlations for pad width and standoff height, and a strong positive correlation for PCB thickness. The optimal parameters – pad length 0.66 mm, pad width 0.25 mm, solder joint standoff height 0.09 mm, and PCB thickness 1.2 mm – reduced maximum stress by 10.8 MPa. The research findings provide theoretical guidance for reducing the bending-torsion coupled stress of QFN solder joints.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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