基于65nm CMOS技术的混合堆叠变压器和集成收发器开关的紧凑射频模块

IF 4.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yuting Chen;Qing Guo;Yue Ma;Xingang Ren;Bo Wu;Gang Wang;Xianliang Wu
{"title":"基于65nm CMOS技术的混合堆叠变压器和集成收发器开关的紧凑射频模块","authors":"Yuting Chen;Qing Guo;Yue Ma;Xingang Ren;Bo Wu;Gang Wang;Xianliang Wu","doi":"10.1109/TCSII.2025.3541586","DOIUrl":null,"url":null,"abstract":"In this brief, we propose an RF module that integrates a Doherty power amplifier (PA), a low noise amplifier (LNA), and a transceiver (TRX) switch. This configuration enables transmitter (TX) and receiver (RX) mode conversion using a single MOSFET as a switch and a hybrid stacked transformer (HSTF) that covers just 0.0182 mm2. The HSTF co-designs the output matching network (OMN) of the Doherty PA and the input matching network (IMN) of the LNA, thereby reducing insertion loss and significantly miniaturizing the RF front-end. The introduction of an adjustable capacitor bank helps in regulating the parasitic capacitance generated by different operating modes in the HSTF. The 35–41 GHz TRX front-end is implemented in a 65 nm CMOS (1P9M) process. In the TX mode, the high saturated output power (Psat), 1-dB output compression point (OP1dB) and peak power added efficiency (PAE) are measured as 18.6 dBm, 17.7 dBm, and 25.8% at 38 GHz, respectively. The measured PAE at 6-dB and 9-dB power back-off (PBO) efficiency are 18.3% and 13.7%, resulting in efficiency enhancement ratios of 1.46 and 1.51 when compared with an ideal class-B PA. In the RX mode, the minimum noise figure (NF) is 4.8 dB at 38 GHz. The overall chip size of the TRX, including the three-stage PA/LNA and I/O pads, is approximately <inline-formula> <tex-math>$1.34\\times 0.98$ </tex-math></inline-formula> mm2.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 4","pages":"549-553"},"PeriodicalIF":4.9000,"publicationDate":"2025-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Compact RF Module With Hybrid Stacked Transformer and Integrated Transceiver Switch in 65 nm CMOS Technology\",\"authors\":\"Yuting Chen;Qing Guo;Yue Ma;Xingang Ren;Bo Wu;Gang Wang;Xianliang Wu\",\"doi\":\"10.1109/TCSII.2025.3541586\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this brief, we propose an RF module that integrates a Doherty power amplifier (PA), a low noise amplifier (LNA), and a transceiver (TRX) switch. This configuration enables transmitter (TX) and receiver (RX) mode conversion using a single MOSFET as a switch and a hybrid stacked transformer (HSTF) that covers just 0.0182 mm2. The HSTF co-designs the output matching network (OMN) of the Doherty PA and the input matching network (IMN) of the LNA, thereby reducing insertion loss and significantly miniaturizing the RF front-end. The introduction of an adjustable capacitor bank helps in regulating the parasitic capacitance generated by different operating modes in the HSTF. The 35–41 GHz TRX front-end is implemented in a 65 nm CMOS (1P9M) process. In the TX mode, the high saturated output power (Psat), 1-dB output compression point (OP1dB) and peak power added efficiency (PAE) are measured as 18.6 dBm, 17.7 dBm, and 25.8% at 38 GHz, respectively. The measured PAE at 6-dB and 9-dB power back-off (PBO) efficiency are 18.3% and 13.7%, resulting in efficiency enhancement ratios of 1.46 and 1.51 when compared with an ideal class-B PA. In the RX mode, the minimum noise figure (NF) is 4.8 dB at 38 GHz. The overall chip size of the TRX, including the three-stage PA/LNA and I/O pads, is approximately <inline-formula> <tex-math>$1.34\\\\times 0.98$ </tex-math></inline-formula> mm2.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"72 4\",\"pages\":\"549-553\"},\"PeriodicalIF\":4.9000,\"publicationDate\":\"2025-02-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10884979/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10884979/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

在本文中,我们提出了一种集成了Doherty功率放大器(PA)、低噪声放大器(LNA)和收发器(TRX)开关的射频模块。这种配置使发射器(TX)和接收器(RX)模式转换使用单个MOSFET作为开关和混合堆叠变压器(HSTF),仅覆盖0.0182 mm2。HSTF共同设计了Doherty PA的输出匹配网络(OMN)和LNA的输入匹配网络(IMN),从而减少了插入损耗,显著缩小了射频前端。引入可调电容组有助于调节HSTF中不同工作模式产生的寄生电容。35-41 GHz TRX前端采用65纳米CMOS (1P9M)工艺实现。在TX模式下,38 GHz时的高饱和输出功率(Psat)、1 db输出压缩点(OP1dB)和峰值功率附加效率(PAE)分别为18.6 dBm、17.7 dBm和25.8%。在6db和9db功率回退(PBO)效率下,实测的PAE分别为18.3%和13.7%,与理想的b类PA相比,效率增强比分别为1.46和1.51。RX模式下,38ghz时最小噪声系数为4.8 dB。TRX的整体芯片尺寸(包括三级PA/LNA和I/O焊盘)约为1.34美元× 0.98美元mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Compact RF Module With Hybrid Stacked Transformer and Integrated Transceiver Switch in 65 nm CMOS Technology
In this brief, we propose an RF module that integrates a Doherty power amplifier (PA), a low noise amplifier (LNA), and a transceiver (TRX) switch. This configuration enables transmitter (TX) and receiver (RX) mode conversion using a single MOSFET as a switch and a hybrid stacked transformer (HSTF) that covers just 0.0182 mm2. The HSTF co-designs the output matching network (OMN) of the Doherty PA and the input matching network (IMN) of the LNA, thereby reducing insertion loss and significantly miniaturizing the RF front-end. The introduction of an adjustable capacitor bank helps in regulating the parasitic capacitance generated by different operating modes in the HSTF. The 35–41 GHz TRX front-end is implemented in a 65 nm CMOS (1P9M) process. In the TX mode, the high saturated output power (Psat), 1-dB output compression point (OP1dB) and peak power added efficiency (PAE) are measured as 18.6 dBm, 17.7 dBm, and 25.8% at 38 GHz, respectively. The measured PAE at 6-dB and 9-dB power back-off (PBO) efficiency are 18.3% and 13.7%, resulting in efficiency enhancement ratios of 1.46 and 1.51 when compared with an ideal class-B PA. In the RX mode, the minimum noise figure (NF) is 4.8 dB at 38 GHz. The overall chip size of the TRX, including the three-stage PA/LNA and I/O pads, is approximately $1.34\times 0.98$ mm2.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Transactions on Circuits and Systems II: Express Briefs
IEEE Transactions on Circuits and Systems II: Express Briefs 工程技术-工程:电子与电气
CiteScore
7.90
自引率
20.50%
发文量
883
审稿时长
3.0 months
期刊介绍: TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: Circuits: Analog, Digital and Mixed Signal Circuits and Systems Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic Circuits and Systems, Power Electronics and Systems Software for Analog-and-Logic Circuits and Systems Control aspects of Circuits and Systems.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信