Negative capacitance double-gate MOSFET for advanced low-power electronic applications

The negative capacitance metal–oxide–semiconductor field-effect transistor (NC-MOSFET) has gained significant attention for its potential in low-power applications. This paper introduces a novel triple-material double-gate negative capacitance MOSFET (TM-DG-NC-MOSFET) architecture, analyzed through technology computer-aided design (TCAD) simulations to assess its DC, analog, linearity, and distortion performance characteristics. For comparison, a triple-material double-gate MOSFET (TM-DG-MOSFET) without the negative capacitance effect is also designed and simulated. Key device parameters are optimized for both architectures. TCAD simulation results at $V_{DS}$ = 0.1 V reveal that the TM-DG-NC-MOSFET achieves a subthreshold swing of 25 mV/decade, an on-state current of $3.19\times 10^{-3}$ A/$\mu m$, and a switching ratio of $5.13\times 10^7$, outperforming the baseline TM-DG-MOSFET, which exhibits a subthreshold swing of 77 mV/decade, an on-state current of $0.83\times 10^{-3}$ A/$\mu m$, and a switching ratio of $1.34\times 10^7$. Comparative analysis shows that the TM-DG-NC-MOSFET offers enhanced DC, analog, and linearity performance with reduced distortion, indicating its suitability as a promising candidate for low-power circuit applications.