Shubham Ranjan;Sparsh Kapar;Czang-Ho Lee;William S. Wong;Manoj Sachdev
{"title":"单极非晶硅薄膜晶体管柔性低功耗数字电路","authors":"Shubham Ranjan;Sparsh Kapar;Czang-Ho Lee;William S. Wong;Manoj Sachdev","doi":"10.1109/JFLEX.2025.3525598","DOIUrl":null,"url":null,"abstract":"Thin-film transistor (TFT) technology has demonstrated its effectiveness in large-area cost-efficient applications such as displays, flexible electronics, and medical devices. However, TFTs are typically unipolar in nature, and therefore, the realization of CMOS-like digital circuits is challenging. Traditional methods for implementing logic gates and complex circuits with unipolar TFT devices lead to high static power consumption and limited output swing. While various mitigation techniques have been developed, they fail to eliminate the direct path current problem in these circuits, which hinders static power reduction. The objective of this study is to address these issues and study its effect on flexible substrate. In this article, we propose logic gates that address these issues using a half-latch circuit. To demonstrate the concept, a 3-to-8 decoder was built using only n-type amorphous silicon (a-Si:H) TFTs on both glass and flexible substrates. We analyzed the impact of bending and substrate materials on the design. It was observed that the TFTs show an increase in current up to 8% under tensile stress, while a decrease in current up to 4% under compressive stress on flexible substrate. Measurements indicate that the proposed design reduces the average total power consumption of the 3-to-8 decoder by 46.5% compared with state-of-the-art techniques under various conditions.","PeriodicalId":100623,"journal":{"name":"IEEE Journal on Flexible Electronics","volume":"3 12","pages":"533-543"},"PeriodicalIF":0.0000,"publicationDate":"2025-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Flexible Low-Power Digital Circuits With Unipolar Amorphous Silicon Thin-Film Transistors\",\"authors\":\"Shubham Ranjan;Sparsh Kapar;Czang-Ho Lee;William S. Wong;Manoj Sachdev\",\"doi\":\"10.1109/JFLEX.2025.3525598\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Thin-film transistor (TFT) technology has demonstrated its effectiveness in large-area cost-efficient applications such as displays, flexible electronics, and medical devices. However, TFTs are typically unipolar in nature, and therefore, the realization of CMOS-like digital circuits is challenging. Traditional methods for implementing logic gates and complex circuits with unipolar TFT devices lead to high static power consumption and limited output swing. While various mitigation techniques have been developed, they fail to eliminate the direct path current problem in these circuits, which hinders static power reduction. The objective of this study is to address these issues and study its effect on flexible substrate. In this article, we propose logic gates that address these issues using a half-latch circuit. To demonstrate the concept, a 3-to-8 decoder was built using only n-type amorphous silicon (a-Si:H) TFTs on both glass and flexible substrates. We analyzed the impact of bending and substrate materials on the design. It was observed that the TFTs show an increase in current up to 8% under tensile stress, while a decrease in current up to 4% under compressive stress on flexible substrate. Measurements indicate that the proposed design reduces the average total power consumption of the 3-to-8 decoder by 46.5% compared with state-of-the-art techniques under various conditions.\",\"PeriodicalId\":100623,\"journal\":{\"name\":\"IEEE Journal on Flexible Electronics\",\"volume\":\"3 12\",\"pages\":\"533-543\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2025-01-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal on Flexible Electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10820362/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal on Flexible Electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10820362/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Flexible Low-Power Digital Circuits With Unipolar Amorphous Silicon Thin-Film Transistors
Thin-film transistor (TFT) technology has demonstrated its effectiveness in large-area cost-efficient applications such as displays, flexible electronics, and medical devices. However, TFTs are typically unipolar in nature, and therefore, the realization of CMOS-like digital circuits is challenging. Traditional methods for implementing logic gates and complex circuits with unipolar TFT devices lead to high static power consumption and limited output swing. While various mitigation techniques have been developed, they fail to eliminate the direct path current problem in these circuits, which hinders static power reduction. The objective of this study is to address these issues and study its effect on flexible substrate. In this article, we propose logic gates that address these issues using a half-latch circuit. To demonstrate the concept, a 3-to-8 decoder was built using only n-type amorphous silicon (a-Si:H) TFTs on both glass and flexible substrates. We analyzed the impact of bending and substrate materials on the design. It was observed that the TFTs show an increase in current up to 8% under tensile stress, while a decrease in current up to 4% under compressive stress on flexible substrate. Measurements indicate that the proposed design reduces the average total power consumption of the 3-to-8 decoder by 46.5% compared with state-of-the-art techniques under various conditions.