具有pi型负载网络的28 ghz高效j类SiGe功率放大器

IF 2.2 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2025-03-25 DOI:10.1016/j.vlsi.2025.102415

Vasileios Manouras, Yannis Papananos

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引用次数: 0

摘要

本文介绍了一种用于毫米波5G MIMO应用的28 ghz单级j类功率放大器。提出了一种pi型负载网络，为j类工作模式提供所需的基频和二次谐波阻抗终端。PA采用英飞凌的130 nm SiGe BiCMOS制程实现，在28 GHz时饱和输出功率Psat=16.7dBm，功率附加效率PAE=42.8%。此外，所提出的PA显示出令人印象深刻的平均PAE分别为17.2%和14.7%，同时在平均输出功率分别为8.09和7.15 dBm时实现3和6 Gbps 64-QAM工作。带内和带外线性度为<；在没有任何数字预失真的情况下，分别为- 26db和-26.5 dBc。

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A 28-GHz highly efficient Class-J SiGe power amplifier with pi-type load network

This paper presents a 28-GHz, single-stage, Class-J Power Amplifier for potential use in mm-Wave 5G MIMO applications. A pi-type load network is proposed to provide the required fundamental and second harmonic impedance terminations for a Class-J operation mode. The PA is implemented in Infineon's 130 nm SiGe BiCMOS process achieving a saturation output power

P_{s a t} = 16.7 d B m

and a remarkably high power-added efficiency

P A E = 42.8 %

at 28 GHz. Moreover, the proposed PA exhibits an impressive average PAE of 17.2 % and 14.7 % respectively, while enabling 3 and 6 Gbps 64-QAM operation at an average output power of 8.09 and 7.15 dBm respectively. The in-band and out-of-band linearities, are < -26 dB and <-26.5 dBc respectively in the absence of any digital pre-distortion.

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.