一种动态电压、频率和分辨率可扩展（DVFRS）的8- 10b 12.5至734 MS/s非交错SAR ADC，在22nm FDSOI中具有0.8至5.9 fJ/ convo - step

IF 4.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2025-03-24 DOI:10.1109/jssc.2025.3550448

Mo’men Mansour, D. Shane Smith, Michael Kines, Samuel Ellicott, Trevor Dean, Vipul J. Patel, Waleed Khalil

引用次数: 0

摘要

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A Dynamic Voltage-, Frequency-, and Resolution-Scalable (DVFRS) 8-10 b 12.5-to-734 MS/s Non-Interleaved SAR ADC With 0.8-to-5.9 fJ/conv-Step in 22-nm FDSOI

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来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.