基于AOT控制的285-nA静态电流、94.7%峰值效率降压变换器

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yuxin Zhang;Jueping Cai;Jizhang Chen;Lifeng Jiang;Yixin Yin
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引用次数: 0

摘要

提出了一种基于自适应准时控制的超低静态电流dc-dc降压变换器。为了减少物联网(IoT)设备待机状态下dc-dc降压变换器电路的能量损耗,在该变换器中设计了一个纳米安培静态电流控制回路。为了减少基准电压消耗的静态电流并提高其线路灵敏度(LS),本文提出的转换器中的基准电压是基于亚阈值CMOS实现的预调节电压,静态电流仅为20 nA。同时,为了在超低负载下保持变换器的高效率,提出了一种基于动态偏置模式选择电路的自适应比较器,该电路将负载条件转换为时间信息,在超低负载下切换比较器的偏置电流和增益,使比较器的静态电流仅为65 nA。所提出的转换器在面积为1.35 mm2的0.18- $\mu $ m BCD工艺中实现。实验结果表明,该变换器的最小静态电流为285 nA,在10~ 300 mA负载范围内保持80%以上的转换效率,峰值效率为94.7%,在2 ~ 5.5 V电源条件下输出为0.9 ~ 4.8 V。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 285-nA Quiescent Current, 94.7% Peak Efficiency Buck Converter With AOT Control for IoT Application
An ultralow quiescent current dc-dc buck converter based on adaptive on-time (AOT) control is presented in this article. To minimize the energy wastage of the dc-dc buck converter circuit when the Internet-of-Things (IoT) device is in standby mode, a control loop with nano-ampere quiescent current is proposed in this converter. To reduce the quiescent current consumed by the voltage reference and improve its line sensitivity (LS), the voltage reference in the proposed converter is preregulated and based on the subthreshold CMOS implementation, with a quiescent current of only 20 nA. Meanwhile, for purpose of maintaining high efficiency of the converter under the ultralow load, an adaptive comparator based on the dynamic bias mode selection circuit is proposed, which converts the load conditions into time information and switches the bias current and gain of the comparator under ultralow loads, and the quiescent current of the comparator is only 65 nA. The proposed converter is implemented in a 0.18- $\mu $ m BCD process with an area of 1.35 mm2. Experimental results show that the converter has a minimum quiescent current of 285 nA, maintains more than 80% conversion efficiency over a load range of $10~\mu $ A–300 mA and a peak efficiency of 94.7%, and has an output of 0.9–4.8 V over a supply condition of 2–5.5 V.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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