Built-In Self-Repair of Small Delay Faults Occurring to TSVs in a 3D-DRAM Using an Enhanced Pulse-Vanishing Test

In a 3D-DRAM, multiple DRAM dice are stacked together and bonded vertically with through-silicon vias (TSVs). It is known that a 3D-DRAM could operate at a very high speed, and even a small delay fault could cause a failure. Even though numerous prior works have been proposed to perform built-in self-repair (BISR) for faulty TSVs in a 3D-DRAM, they cannot handle sub-100-ps small delay faults easily. In this work, we aim to fix this problem with a “progressively shrinking pulse-vanishing test (PV-Test).” Our BISR scheme streamlines the entire test-and-repair (TAR) process integrating several techniques, including small-delay-fault detection, on-the-spot diagnosis, test result broadcasting, TSV repair, and the final validation. The experimental results show that it can indeed detect and repair a small delay fault that causes a sub-100-ps extra delay on a TSV.