一种新型的nmosfet嵌入式高保持电压可控硅，适用于5v应用

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-03-13 DOI:10.1016/j.mejo.2025.106625

Hongshen Wang , Lingli Qian , Zhiyu Wang , Yuanjie Zhou , Qian Liu , Hao Wu , Jian Shen , Juan Luo , Shengdong Hu

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引用次数: 0

摘要

本研究提出一种新型嵌入nmosfet的高持压矽控整流器（NNEHHVSCR）。在这种结构中，基于传统的低触发可控硅，增加了P+电桥区域，NMOSFET进一步嵌入，并辅以外部电气连接。这种配置创建了多个ESD电流路径来分流电流，从而提高了保持电压。利用Sentaurus TCAD软件对该结构的工作原理和I-V特性曲线进行了仿真。结果表明，与参考器件相比，NNEHHVSCR在保持几乎不变的触发电压（Vt1）的同时，将保持电压（Vh）从3.89 V显著提高到6.03 V，超过了5 V ESD设计窗口定义的下限电压限制。同时，失效电流（It2）仅从2.00 A略微降低到1.89 A，具有可接受的权衡。因此，NNEHHVSCR具有出色的锁存抗扰度和ESD稳健性，适用于5v ESD应用。

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A novel NMOSFET-embedded high holding voltage SCR for 5-V applications

This study presents a novel NMOSFET-embedded high holding voltage silicon-controlled rectifier (NNEHHVSCR). In this structure, based on the conventional low-trigger SCR with added P+ bridge regions, the NMOSFET is further embedded, supplemented with external electrical connections. This configuration creates multiple ESD current paths to divert current, thereby enhancing the holding voltage. The working principle and I-V characteristic curves of the proposed structure are simulated using Sentaurus TCAD software. The results show that, compared to the reference device, while maintaining a nearly unchanged trigger voltage (V_t1), the NNEHHVSCR significantly increases the holding voltage (V_h) from 3.89 V to 6.03 V, surpassing the lower voltage limit defined by the 5-V ESD design window. Meanwhile, the failure current (I_t2) only decreases slightly from 2.00 A to 1.89 A, with an acceptable trade-off. Therefore, the NNEHHVSCR demonstrates excellent latch-up immunity and ESD robustness, making it suitable for 5-V ESD applications.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.