BiDSRS+: fpga的资源高效可重构实时双向超分辨率系统

IF 3.7 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Rashed Al Amin;Roman Obermaisser
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引用次数: 0

摘要

超分辨率(SR)系统由于其在计算机视觉和视觉通信中的重要应用,代表了信息和通信技术(ICT)中快速发展的领域。将SR系统与深度神经网络(dnn)集成是一种广泛采用的方法,可以利用更快、更好的图像重建。然而,与基于dnn的SR系统相关的实时计算需求、广泛的能源开销和巨大的内存占用限制了它们的吞吐量和可扩展性。现场可编程门阵列(fpga)由于其可重构特性和并行计算能力,为探索SR系统的结构和架构提供了一个可行且有前途的解决方案。现有的基于fpga的解决方案可以有效地降低SR系统的计算延迟,但往往会导致更高的资源和能源消耗。此外,传统的SR技术通常只关注图像或视频的升级或降级,而不提供任何缩放可重构性。为了解决这些限制,本文介绍了一种基于FPGA的资源高效可重构实时SR系统BiDSRS+,该系统采用改进的双三次插值方法。此外,BiDSRS+支持图像和视频的放大和缩小,增强了其通用性。对Xilinx ZCU 102 FPGA板进行的评估显示,与最先进的基于dnn的SR系统相比,节省了大量资源,减少了44倍的LUT, 31倍的BRAM和35倍的DSP利用率,尽管吞吐量降低了0.5倍。此外,与领先的基于算法的SR系统相比,BiDSRS+实现了5.8倍的LUT, 1.75倍的BRAM和2.3倍的功耗降低,而不影响吞吐量。BiDSRS+具有较高的资源效率和可重构性,吞吐量可达4K@60 FPS,在推动可持续节能的绿色视频通信方面具有显著优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
BiDSRS+: Resource Efficient Reconfigurable Real Time Bidirectional Super Resolution System for FPGAs
Super-resolution (SR) systems represent a rapidly advancing area within Information and Communication Technology (ICT) due to their significant applications in computer vision and visual communication. Integrating SR systems with Deep Neural Networks (DNNs) is a widely adopted method for leveraging faster and improved image reconstruction. However, the real-time computational demands, extensive energy overhead and the huge memory footprints associated with DNN-based SR systems limit their throughput and scalability. Field-programmable gate arrays (FPGAs) present a viable and promising solution for exploring the structure and architecture of SR systems due to their reconfigurable nature and parallel computing capabilities. The existing FPGA-based solutions can effectively reduce the computational latency in SR systems, they often result in higher resource and energy consumption. Besides, the traditional SR techniques generally focus on either upscaling or downscaling images or videos without offering any scaling reconfigurability. To address these limitations, this paper introduces BiDSRS+, a novel FPGA based resource-efficient and reconfigurable real-time SR system using modified bicubic interpolation method. In addition, BiDSRS+ supports both upscaling and downscaling of images and videos, enhancing its versatility. Evaluations conducted on the Xilinx ZCU 102 FPGA board reveal substantial resource savings, with reductions of 44x LUT, 31x BRAM, and 35x DSP utilization compared to state-of-the-art DNN-based SR systems, albeit with a trade-off in throughput of 0.5x. Furthermore, when compared to leading algorithm-based SR systems, BiDSRS+ achieves reductions of 5.8x LUT, 1.75x BRAM, and 2.3x Power consumption, without compromising the throughput. Due to its high resource efficiency and reconfigurability with a throughput of 4K@60 FPS, BiDSRS+ offers significant advantages in promoting sustainable and energy-efficient green video communication.
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来源期刊
CiteScore
8.50
自引率
2.20%
发文量
86
期刊介绍: The IEEE Journal on Emerging and Selected Topics in Circuits and Systems is published quarterly and solicits, with particular emphasis on emerging areas, special issues on topics that cover the entire scope of the IEEE Circuits and Systems (CAS) Society, namely the theory, analysis, design, tools, and implementation of circuits and systems, spanning their theoretical foundations, applications, and architectures for signal and information processing.
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