自组装单层三维集成封装的介电键合方法

IF 2.1 4区 材料科学 Q3 MATERIALS SCIENCE, MULTIDISCIPLINARY
Wonbin Kim, Sungjae Choi, Seongi Lee, Young-Chang Joo, Byoung-Joon Kim
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引用次数: 0

摘要

大数据和人工智能的出现,促使半导体行业由于器件规模的限制,越来越多地采用先进的三维堆叠封装技术。传统的包装方法依赖于微凸点和粘合剂,难以满足对亚微米细间距日益增长的需求。为了解决这些挑战,无碰撞直接键合技术,如Cu/ sio2杂化键合,以及使用等离子体处理的表面活化键合(SAB)受到了关注。然而,等离子体处理存在风险,包括Cu氧化和在细间距应用中Cu颗粒转移引起的潜在短路。本研究提出了一种新的无等离子体方法,该方法利用自组装单层(SAMs),薄分子层在表面上自发地产生有序结构,用于介质表面激活。我们将3-氨基丙基三乙氧基硅烷(APTES)沉积在二氧化硅(SiO₂)上,形成了一层增强键合的亲水性层。值得注意的是,通过形成非晶硅(Si)层,热处理显著提高了界面粘附强度。这种基于sam的键合技术可以在不需要等离子体的情况下实现介电表面,为未来3D集成封装中的细间距混合键合应用带来了希望。图形抽象
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Dielectric Bonding Method for 3D Integration Packaging Using Self-Assembled Monolayer

The emergence of big data and artificial intelligence has promoted the semiconductor industry to increasingly adopt advanced three-dimensional stacking packaging technologies due to the limitations of device scaling. Traditional packaging methods, which rely on micro bumps and adhesives, struggle to meet the growing demands for sub-micrometer fine pitches. To address these challenges, bump-less direct bonding techniques, such as Cu/SiO₂ hybrid bonding, have gained attention, along with surface-activated bonding (SAB) using plasma treatment. However, plasma treatment poses risks, including Cu oxidation and potential short circuits from Cu particle transfer in fine-pitch applications. This study presents a novel plasma-free method that utilizes self-assembled monolayers (SAMs), thin molecular layers that spontaneously create ordered structures on surfaces, for dielectric surface activation. We deposited 3-aminopropyltriethoxysilane (APTES) on silicon dioxide (SiO₂), resulting in a hydrophilic layer that enhances bonding. Notably, a heat treatment significantly improved interfacial adhesion strength through the formation of an amorphous silicon (Si) layer. This SAM-based bonding technique, which enables dielectric surface without the need for plasma, holds promise for future fine-pitch hybrid bonding applications in 3D integrated packaging.

Graphical abstract

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来源期刊
Electronic Materials Letters
Electronic Materials Letters 工程技术-材料科学:综合
CiteScore
4.70
自引率
20.80%
发文量
52
审稿时长
2.3 months
期刊介绍: Electronic Materials Letters is an official journal of the Korean Institute of Metals and Materials. It is a peer-reviewed international journal publishing print and online version. It covers all disciplines of research and technology in electronic materials. Emphasis is placed on science, engineering and applications of advanced materials, including electronic, magnetic, optical, organic, electrochemical, mechanical, and nanoscale materials. The aspects of synthesis and processing include thin films, nanostructures, self assembly, and bulk, all related to thermodynamics, kinetics and/or modeling.
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