A 4.7-to-5.3-Gb/s Fault-Injection and Side-Channel Attack-Resistant AES-256 Engine Using Masked Isomorphic Composite Fields in Intel 4 CMOS

Physical attacks such as fault-injection attacks (FIAs) and side-channel attacks (SCAs) offer powerful adversarial tools to malicious parties that severely degrade the security offered by cryptographic ciphers. Laser FIA mounted on an unprotected advanced encryption standard (AES)-256 engine in Intel 4 CMOS process demonstrates a minimum-traces-to-disclosure (MTD) of 37M encryptions to generate eight exploitable ciphertexts, reducing AES key search space to a single guess with differential fault analysis (DFA). Power SCA offers a more powerful tool, enabling extraction of all key bytes through correlation power analysis (CPA) of 25k current traces. In this article, we present a unified FIA and SCA-resistant AES-256 engine fabricated in Intel 4 CMOS. Redundant AES round computations using isomorphic GF( $2{^{4}}$ )2 composite-field representations and reconfigurable byte dataflows enable real-time detection of corrupted ciphertext with a fault-coverage of 99.3% and $143{\times }$ improvement in MTD while limiting area overhead to 12%. FIA-resistant configurations with 1/2/3 redundant rounds generate AES-256 throughput of 5.3/4.98/4.7 Gb/s, incurring a performance overhead of 13%/18%/23% compared to an unprotected AES. Undervoltage attack measurements show fault coverage of 99.98%, representing a $5000{\times }$ MTD improvement. Random additive-masking circuits with redundant composite-field computations demonstrate a measured MTD of >1 billion encryption traces.