Reliability analysis of PoP stacked solder joints under thermal cycling load based on the optimal equivalent model

An optimal equivalent model for PoP-stacked solder joints is developed based on the nonlinear load-deformation response. The thermal stress distribution of solder joints in PoP assembly arrays subjected to thermal cycling loads is simulated and analyzed. The thermal fatigue failure modes of critical solder joints in the array are discussed, and the thermal fatigue life of these joints is calculated. Furthermore, the influence of structural parameters on solder joint thermal stress is elucidated. The results indicate that the incorporation of the optimal equivalent model not only improves the efficiency of simulation analysis but also enhances the accuracy of solder joint thermal stress prediction. The solder joints in the lower array of the PoP assembly experience higher thermal stress compared to those in the upper array. Solder joints at the corners of the array exhibit higher thermal stress and are identified as critical components. Cracks initially nucleate at the interface between the solder joint and the copper pad, propagating along the interface and eventually appearing within the solder joint. The thermal fatigue life of critical solder joints in the upper array is 3–4 times longer than that of the critical solder joints in the lower array. The ranking of the influence of specific structural parameters on solder joint thermal stress is as follows: solder joint height > solder joint diameter > PCB thickness > substrate thickness. Thermal stress in solder joints exhibits a negative correlation with solder joint height and diameter, and a positive correlation with PCB and substrate thickness.