脉冲神经网络中超低静功率线性电荷集成的补偿电流镜像神经元电路

IF 6.8 Q1 AUTOMATION & CONTROL SYSTEMS

Advanced intelligent systems (Weinheim an der Bergstrasse, Germany) Pub Date : 2025-02-15 DOI:10.1002/aisy.202570010

Jonghyuk Park, Sungjoon Kim, Woo Young Choi

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引用次数: 0

摘要

在2400673号文章中，朴钟赫、金成俊和崔禹永提出了一种神经元电路，该电路在保证低功耗的同时优化了峰值神经网络（SNNs）的向量矩阵乘法性能。本研究验证了通过CMOS神经元电路实现高SNN系统精度，以防止在大量突触阵列和神经元集成过程中发生非线性操作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

Compensated Current Mirror Neuron Circuits for Linear Charge Integration with Ultralow Static Power in Spiking Neural Networks

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Compensated Current Mirror Neuron Circuits for Linear Charge Integration with Ultralow Static Power in Spiking Neural Networks

Spiking Neural Networks

In article number 2400673, Jonghyuk Park, Sungjoon Kim, and Woo Young Choi present a neuron circuit that optimizes vector-matrix multiplication performance in spiking neural networks (SNNs) while ensuring low-power consumption. This research validates the achievement of high SNN system accuracy through a CMOS neuron circuit arranged to prevent non-linear operations that occur during the integration of massive synaptic arrays and neurons.

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来源期刊

Advanced intelligent systems (Weinheim an der Bergstrasse, Germany)

CiteScore

1.30

自引率

0.00%

发文量

审稿时长

4 weeks