QCA纳米技术中新型超高效单层纳米加减法器的建模

IF 2.9 4区 计算机科学 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Javeed Iqbal Reshi, M․Tariq Banday, Farooq A. Khanday
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引用次数: 0

摘要

量子点元胞自动机被认为是设计纳米级电路的一种有前途的替代技术。它以量子力学的原理为基础,利用量子点作为信息处理和计算的基石。QCA具有许多优点,包括超低能耗、增强性能、高器件密度、抗缩放限制和固有的并行性。先前基于量子点元胞自动机(QCA)的加减法电路的实现面临着诸如细胞计数、复杂性和能量消耗等重大挑战。本文提出了一种基于新型三输入异或门的加减法电路设计。所提出的电路不需要任何旋转单元或交叉,并且基于单层设计,易于制造。此外,与已知的同类产品相比,所提出的设计在细胞数量、复杂性和能量消耗方面显着减少。具体来说,加法、减法和加-减法分别减少14.28%、42.85%和56.66%。这些改进表明电路效率有了实质性的提高。利用qcaddesigner 2.0.3模拟器验证了所提出布局的功能有效性。使用qcaddesigner - e工具进行功率效率分析,使设计人员能够分析,优化和验证所提出电路的功耗特性。加法器、减法器和加-减法器的总能耗分别为1.10e-002 eV、1.12e-002 eV、1.06e-002 eV。此外,利用qcaddesigner - e工具观测了9.96e-004 eV、1.002 -003 eV、9.63e-004 eV的平均能量耗散。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Modelling of novel ultra-efficient single layer nano-scale adder-subtractor in QCA nanotechnology
Quantum dot Cellular Automata is considered as promising alternative technology for designing nanoscale circuits. It operates on the principle derived from quantum mechanics and utilizes quantum dots as building blocks for information processing and computations. QCA offers numerous benefits including ultra-low energy dissipation, enhanced performance, high device density, resistance to scaling limitations and inherent parallelism. Previous realizations of Quantum Dot Cellular Automata (QCA) based-adder and subtractor circuits faced significant challenges like cell count, complexity and energy dissipation. This paper, proposes novel designs of adder-subtractor circuits based on novel 3-input XOR gate. The proposed circuits do not require any rotated cells or crossovers and are based on single layer design that eases the manufacturability. In addition, the proposed designs demonstrate significant reduction in cell count, complexity and energy dissipation compared to best known prior counterparts. Specifically, the reductions are 14.28 %, 42.85 %, and 56.66 % for adder, subtractor and adder-subtractor respectively. These improvements signify a substantial gain in circuit efficiency. The functional validity of the proposed layouts is verified using QCADesigner 2.0.3 simulator. The power efficiency analysis has been performed using QCADesigner-E tool, which enables the designer to analyse, optimize and validate the power consumption characteristics of the proposed circuits. The overall energy consumption of adder, subtractor and adder-subtractor is reported to be 1.10e-002 eV, 1.12e-002 eV, 1.06e-002 eV respectively. Additionally, the average energy dissipation of 9.96e-004 eV, 1.02e-003 eV, 9.63e-004 eV was observed using QCADesigner-E tool.
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来源期刊
Nano Communication Networks
Nano Communication Networks Mathematics-Applied Mathematics
CiteScore
6.00
自引率
6.90%
发文量
14
期刊介绍: The Nano Communication Networks Journal is an international, archival and multi-disciplinary journal providing a publication vehicle for complete coverage of all topics of interest to those involved in all aspects of nanoscale communication and networking. Theoretical research contributions presenting new techniques, concepts or analyses; applied contributions reporting on experiences and experiments; and tutorial and survey manuscripts are published. Nano Communication Networks is a part of the COMNET (Computer Networks) family of journals within Elsevier. The family of journals covers all aspects of networking except nanonetworking, which is the scope of this journal.
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