{"title":"基于动态输出开关的快速瞬态响应分布式电源侧信道攻击缓解","authors":"Xingye Liu;Paul Ampadu","doi":"10.1109/TVLSI.2024.3433429","DOIUrl":null,"url":null,"abstract":"We present a distributed power supply and explore its load transient response and power side-channel security improvements. Typically, countermeasures against power side-channel attacks (PSCAs) are based on specialized dc/dc converters, resulting in large power and area overheads and they are difficult to scale. Moreover, due to limited output voltage range and load regulation, it is not feasible to directly distribute these converters in multicore applications. Targeting those issues, our proposed converter is designed to provide multiple fast-responding voltages and use shared circuits to mitigate PSCAs. The proposed three-output dc/dc converter can deliver 0.33–0.92 V with up to 1 A to each load. Comparing with state-of-the-art power management works, our converter has \n<inline-formula> <tex-math>$2\\times $ </tex-math></inline-formula>\n load step response speed and \n<inline-formula> <tex-math>$4\\times $ </tex-math></inline-formula>\n reference voltage tracking speed. Furthermore, the converter requires \n<inline-formula> <tex-math>$9\\times $ </tex-math></inline-formula>\n less inductance and \n<inline-formula> <tex-math>$3\\times $ </tex-math></inline-formula>\n less output capacitance. In terms of PSCA mitigation, this converter reduces the correlation between input power trace and encryption load current by \n<inline-formula> <tex-math>$107\\times $ </tex-math></inline-formula>\n, which is \n<inline-formula> <tex-math>$3\\times $ </tex-math></inline-formula>\n better than the best standalone work, and it only induces 1.7% area overhead and 2.5% power overhead. The proposed work also increases minimum traces to disclose (MTDs) by \n<inline-formula> <tex-math>$1250\\times $ </tex-math></inline-formula>\n. Considering all the above, our work could be a great candidate to be employed in future multicore systems supplying varying voltages and resisting side-channel attacks. It is the first work bridging the gap between on-chip power management and side-channel security.","PeriodicalId":13425,"journal":{"name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","volume":"33 1","pages":"261-274"},"PeriodicalIF":2.8000,"publicationDate":"2024-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Fast Transient Response Distributed Power Supply With Dynamic Output Switching for Power Side-Channel Attack Mitigation\",\"authors\":\"Xingye Liu;Paul Ampadu\",\"doi\":\"10.1109/TVLSI.2024.3433429\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a distributed power supply and explore its load transient response and power side-channel security improvements. Typically, countermeasures against power side-channel attacks (PSCAs) are based on specialized dc/dc converters, resulting in large power and area overheads and they are difficult to scale. Moreover, due to limited output voltage range and load regulation, it is not feasible to directly distribute these converters in multicore applications. Targeting those issues, our proposed converter is designed to provide multiple fast-responding voltages and use shared circuits to mitigate PSCAs. The proposed three-output dc/dc converter can deliver 0.33–0.92 V with up to 1 A to each load. Comparing with state-of-the-art power management works, our converter has \\n<inline-formula> <tex-math>$2\\\\times $ </tex-math></inline-formula>\\n load step response speed and \\n<inline-formula> <tex-math>$4\\\\times $ </tex-math></inline-formula>\\n reference voltage tracking speed. Furthermore, the converter requires \\n<inline-formula> <tex-math>$9\\\\times $ </tex-math></inline-formula>\\n less inductance and \\n<inline-formula> <tex-math>$3\\\\times $ </tex-math></inline-formula>\\n less output capacitance. In terms of PSCA mitigation, this converter reduces the correlation between input power trace and encryption load current by \\n<inline-formula> <tex-math>$107\\\\times $ </tex-math></inline-formula>\\n, which is \\n<inline-formula> <tex-math>$3\\\\times $ </tex-math></inline-formula>\\n better than the best standalone work, and it only induces 1.7% area overhead and 2.5% power overhead. The proposed work also increases minimum traces to disclose (MTDs) by \\n<inline-formula> <tex-math>$1250\\\\times $ </tex-math></inline-formula>\\n. Considering all the above, our work could be a great candidate to be employed in future multicore systems supplying varying voltages and resisting side-channel attacks. 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A Fast Transient Response Distributed Power Supply With Dynamic Output Switching for Power Side-Channel Attack Mitigation
We present a distributed power supply and explore its load transient response and power side-channel security improvements. Typically, countermeasures against power side-channel attacks (PSCAs) are based on specialized dc/dc converters, resulting in large power and area overheads and they are difficult to scale. Moreover, due to limited output voltage range and load regulation, it is not feasible to directly distribute these converters in multicore applications. Targeting those issues, our proposed converter is designed to provide multiple fast-responding voltages and use shared circuits to mitigate PSCAs. The proposed three-output dc/dc converter can deliver 0.33–0.92 V with up to 1 A to each load. Comparing with state-of-the-art power management works, our converter has
$2\times $
load step response speed and
$4\times $
reference voltage tracking speed. Furthermore, the converter requires
$9\times $
less inductance and
$3\times $
less output capacitance. In terms of PSCA mitigation, this converter reduces the correlation between input power trace and encryption load current by
$107\times $
, which is
$3\times $
better than the best standalone work, and it only induces 1.7% area overhead and 2.5% power overhead. The proposed work also increases minimum traces to disclose (MTDs) by
$1250\times $
. Considering all the above, our work could be a great candidate to be employed in future multicore systems supplying varying voltages and resisting side-channel attacks. It is the first work bridging the gap between on-chip power management and side-channel security.
期刊介绍:
The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society.
Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels.
To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.