Xiaoyu Feng;Xinyuan Lin;Huazhong Yang;Yongpan Liu;Wenyu Sun
{"title":"基于cam的通用映射单元用于图像/点云融合应用的可扩展BEV感知处理器","authors":"Xiaoyu Feng;Xinyuan Lin;Huazhong Yang;Yongpan Liu;Wenyu Sun","doi":"10.1109/JSSC.2024.3514733","DOIUrl":null,"url":null,"abstract":"The integration of multi-sensor data like image and point cloud for information complementarity is crucial for 3-D perception scenarios like autonomous driving. Recently, bird’s eye view (BEV)-based sensor fusion is attracting more and more attention but the significant computational overhead constrains their widespread application at the edge. First, there are numerous irregular memory access operations in BEV fusion networks. For example, sparse convolutions (SCONVs) in the point cloud branch and irregular BEV plane mapping result in significant memory addressing and mapping overhead. Furthermore, multi-sensor fusion leads to rapid expansion of model size, making it difficult and expensive for single-chip solutions to meet the demands. Based on the above challenges, this work proposes an image and point cloud fusion processor with two highlights: a content addressable memory (CAM)-based deep fusion core to accelerate a variety of irregular BEV operations and chip-level parallelism design supporting flexible interconnect topology. The proposed chip is fabricated in 28-nm CMOS technology. Compared with existing image or point cloud accelerators, the proposed chip achieves higher frequency, <inline-formula> <tex-math>$2\\times $ </tex-math></inline-formula> higher area efficiency, and <inline-formula> <tex-math>$2.61\\times $ </tex-math></inline-formula> higher energy efficiency for sparse point cloud processing. To the best of authors’ knowledge, this work is the first accelerator for BEV-based multi-modal fusion networks.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 3","pages":"1002-1013"},"PeriodicalIF":5.6000,"publicationDate":"2024-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Scalable BEV Perception Processor for Image/Point Cloud Fusion Applications Using CAM-Based Universal Mapping Unit\",\"authors\":\"Xiaoyu Feng;Xinyuan Lin;Huazhong Yang;Yongpan Liu;Wenyu Sun\",\"doi\":\"10.1109/JSSC.2024.3514733\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The integration of multi-sensor data like image and point cloud for information complementarity is crucial for 3-D perception scenarios like autonomous driving. Recently, bird’s eye view (BEV)-based sensor fusion is attracting more and more attention but the significant computational overhead constrains their widespread application at the edge. First, there are numerous irregular memory access operations in BEV fusion networks. For example, sparse convolutions (SCONVs) in the point cloud branch and irregular BEV plane mapping result in significant memory addressing and mapping overhead. Furthermore, multi-sensor fusion leads to rapid expansion of model size, making it difficult and expensive for single-chip solutions to meet the demands. Based on the above challenges, this work proposes an image and point cloud fusion processor with two highlights: a content addressable memory (CAM)-based deep fusion core to accelerate a variety of irregular BEV operations and chip-level parallelism design supporting flexible interconnect topology. The proposed chip is fabricated in 28-nm CMOS technology. Compared with existing image or point cloud accelerators, the proposed chip achieves higher frequency, <inline-formula> <tex-math>$2\\\\times $ </tex-math></inline-formula> higher area efficiency, and <inline-formula> <tex-math>$2.61\\\\times $ </tex-math></inline-formula> higher energy efficiency for sparse point cloud processing. To the best of authors’ knowledge, this work is the first accelerator for BEV-based multi-modal fusion networks.\",\"PeriodicalId\":13129,\"journal\":{\"name\":\"IEEE Journal of Solid-state Circuits\",\"volume\":\"60 3\",\"pages\":\"1002-1013\"},\"PeriodicalIF\":5.6000,\"publicationDate\":\"2024-12-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of Solid-state Circuits\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10807165/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10807165/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A Scalable BEV Perception Processor for Image/Point Cloud Fusion Applications Using CAM-Based Universal Mapping Unit
The integration of multi-sensor data like image and point cloud for information complementarity is crucial for 3-D perception scenarios like autonomous driving. Recently, bird’s eye view (BEV)-based sensor fusion is attracting more and more attention but the significant computational overhead constrains their widespread application at the edge. First, there are numerous irregular memory access operations in BEV fusion networks. For example, sparse convolutions (SCONVs) in the point cloud branch and irregular BEV plane mapping result in significant memory addressing and mapping overhead. Furthermore, multi-sensor fusion leads to rapid expansion of model size, making it difficult and expensive for single-chip solutions to meet the demands. Based on the above challenges, this work proposes an image and point cloud fusion processor with two highlights: a content addressable memory (CAM)-based deep fusion core to accelerate a variety of irregular BEV operations and chip-level parallelism design supporting flexible interconnect topology. The proposed chip is fabricated in 28-nm CMOS technology. Compared with existing image or point cloud accelerators, the proposed chip achieves higher frequency, $2\times $ higher area efficiency, and $2.61\times $ higher energy efficiency for sparse point cloud processing. To the best of authors’ knowledge, this work is the first accelerator for BEV-based multi-modal fusion networks.
期刊介绍:
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.