Jae-Hyun Kim;Yousung Park;Doyoung Kwon;Dae-Hyeon Kim;Dong-Kyu Kim;Sung-Chun Park;Yongjae Lee;Jung-Bong Lee;Hyun-Sik Kim
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Previous strategies (both single- and multi-mode) for controlling the SC stage have resulted in either increased output voltage <inline-formula> <tex-math>$(V_{\\text {O}})$ </tex-math></inline-formula> ripples or non-smooth transitions between buck and boost modes, leading to <inline-formula> <tex-math>$V_{\\text {O}}$ </tex-math></inline-formula> fluctuations during mode changes. To overcome these shortcomings, we propose a control technique that seamlessly covers both buck and boost conversions with a single duty cycle (D) while maintaining a lower output ripple. In this work, the flying capacitor, employed in the SC stage, is reutilized for driving the power switches, thereby eliminating the bootstrap overhead. In addition, an adaptive ramp generator is incorporated to ensure immunity to time-division multiple access (TDMA) noise for mobile applications. The SDC-BB converter, fabricated using a 180-nm CMOS process, achieved an output ripple of less than 2.1 mV with a peak efficiency of 96.6%, using a 4.7-<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>H inductor, a 10- <inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>F output capacitor, and a 1-MHz switching frequency. Furthermore, it demonstrated output fluctuations within 2.1 mV during transitions between buck and boost modes and verified immunity to TDMA noise with a transient <inline-formula> <tex-math>${\\Delta } {V_{\\text {O}}}$ </tex-math></inline-formula> of 5.8 mV under a 0.5-V input voltage change over <inline-formula> <tex-math>$20~{\\mu }$ </tex-math></inline-formula>s.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 4","pages":"1248-1264"},"PeriodicalIF":5.6000,"publicationDate":"2024-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Single-Duty-Cycled Buck-Boost Converter Achieving Low Output Ripple and Seamless Mode Transition\",\"authors\":\"Jae-Hyun Kim;Yousung Park;Doyoung Kwon;Dae-Hyeon Kim;Dong-Kyu Kim;Sung-Chun Park;Yongjae Lee;Jung-Bong Lee;Hyun-Sik Kim\",\"doi\":\"10.1109/JSSC.2024.3515100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article presents a single-duty-cycled buck-boost (SDC-BB) converter designed to power mobile organic light-emitting diode (OLED) displays featuring a wide dynamic range (WDR). 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引用次数: 0
摘要
本文提出了一种单占空比降压-升压(SDC-BB)转换器,用于为具有宽动态范围(WDR)的移动有机发光二极管(OLED)显示器供电。传统的BB变换器经常遭受明显的输出波纹和电压尖峰,这项工作旨在通过采用电感-最后拓扑结合多电平开关电容器(SC)级来解决这个问题。以前用于控制SC级的策略(包括单模和多模)导致输出电压$(V_{\text {O}})$波纹增加或降压和升压模式之间的不平滑转换,导致模式变化期间$V_{\text {O}}$波动。为了克服这些缺点,我们提出了一种控制技术,该技术可以在保持较低输出纹波的同时,无缝地覆盖单占空比(D)的降压和升压转换。在这项工作中,在SC阶段使用的飞行电容器被重新用于驱动电源开关,从而消除了自举开销。此外,还引入了自适应斜坡发生器,以确保对移动应用的时分多址(TDMA)噪声免疫。采用180nm CMOS工艺制作的SDC-BB变换器实现了小于2.1 mV的输出纹波,峰值效率为96.6%, using a 4.7- $\mu $ H inductor, a 10- $\mu $ F output capacitor, and a 1-MHz switching frequency. Furthermore, it demonstrated output fluctuations within 2.1 mV during transitions between buck and boost modes and verified immunity to TDMA noise with a transient ${\Delta } {V_{\text {O}}}$ of 5.8 mV under a 0.5-V input voltage change over $20~{\mu }$ s.
A Single-Duty-Cycled Buck-Boost Converter Achieving Low Output Ripple and Seamless Mode Transition
This article presents a single-duty-cycled buck-boost (SDC-BB) converter designed to power mobile organic light-emitting diode (OLED) displays featuring a wide dynamic range (WDR). Traditional BB converters often suffer from significant output ripples and voltage spikes, which this work aims to address by employing an inductor-last topology combined with a multilevel switched-capacitor (SC) stage. Previous strategies (both single- and multi-mode) for controlling the SC stage have resulted in either increased output voltage $(V_{\text {O}})$ ripples or non-smooth transitions between buck and boost modes, leading to $V_{\text {O}}$ fluctuations during mode changes. To overcome these shortcomings, we propose a control technique that seamlessly covers both buck and boost conversions with a single duty cycle (D) while maintaining a lower output ripple. In this work, the flying capacitor, employed in the SC stage, is reutilized for driving the power switches, thereby eliminating the bootstrap overhead. In addition, an adaptive ramp generator is incorporated to ensure immunity to time-division multiple access (TDMA) noise for mobile applications. The SDC-BB converter, fabricated using a 180-nm CMOS process, achieved an output ripple of less than 2.1 mV with a peak efficiency of 96.6%, using a 4.7-$\mu $ H inductor, a 10- $\mu $ F output capacitor, and a 1-MHz switching frequency. Furthermore, it demonstrated output fluctuations within 2.1 mV during transitions between buck and boost modes and verified immunity to TDMA noise with a transient ${\Delta } {V_{\text {O}}}$ of 5.8 mV under a 0.5-V input voltage change over $20~{\mu }$ s.
期刊介绍:
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.