具有 2.4 GHz LO 同步功能的 W 波段 TX/RX 芯片组，可实现 FMCW 雷达的全面可扩展性

IF 5.6 1区工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of Solid-state Circuits Pub Date : 2024-12-17 DOI:10.1109/JSSC.2024.3514667

Jingzhi Zhang;Sherif S. Ahmed;Amin Arbabian

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引用次数: 0

摘要

芯片级联解决方案已广泛应用于毫米波（mm-wave）调频连续波（FMCW）雷达中，以实现多输入多输出（MIMO）操作中的大孔径阵列。然而，可伸缩性在实现过程中仍然存在问题。在这项工作中，我们提出了一种w波段FMCW雷达收发器芯片架构，通过采用低至2.4 GHz的本振（LO）分布频率进行跨片同步，实现了完全的可扩展性。在40纳米CMOS工艺中实现，我们展示了一个四通道接收器芯片和一个单通道发送芯片，可以在80至90 GHz范围内工作。同时，我们使用集成贴片天线的陶瓷介面来封装芯片，以实现封装中的天线（AiP）。为了从片外2.4 ghz本益分布链重构84 ghz FMCW啁啾信号，我们设计了一个基于片上注入锁定的${\times}35$倍频器，并对重构过程中的相位噪声和谐波杂散问题进行了分析和处理。测量的相位噪声和谐波抑制比（HRR）在1 mhz偏移时分别为-112 dBc/Hz和50 dBc以上，允许超过100 db的雷达动态范围。我们演示了一个雷达系统，通过级联两个接收芯片和两个发送芯片来实现$8 \ × 2$ MIMO阵列，并通过室外实验实现了11.3°的角分辨率。原型雷达系统支持先进的芯片级联，这有利于下一代可扩展的高分辨率成像雷达。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A W-Band TX/RX Chipset With 2.4-GHz LO Synchronization Enabling Full Scalability for FMCW Radar

The chip-cascading solution has been widely used in millimeter-wave (mm-wave) frequency-modulated continuous wave (FMCW) radars to enable large-aperture arrays in multiple-input and multiple-output (MIMO) operations. However, scalability remains problematic during implementation. In this work, we propose a W-band FMCW radar transceiver chip architecture to enable full scalability by adopting an local oscillator (LO) distribution frequency as low as 2.4 GHz for cross-chip synchronization. Implemented in the 40-nm CMOS process, we demonstrate a four-channel receiver chip and a single-channel transmitter chip that can operate from 80 to 90 GHz. Meanwhile, we use a ceramic interposer with integrated patch antennas to package the chips to achieve antenna-in-package (AiP). To reconstruct the 84-GHz FMCW chirp signal from the off-chip 2.4-GHz LO distribution chain, we design an on-chip injection-locking-based

${\times }35$

frequency multiplier, while the phase noise and harmonic spur issues during reconstruction have been analyzed and carefully arranged. The measured phase noise and harmonic rejection ratio (HRR) are -112 dBc/Hz at 1-MHz offset and above 50 dBc, respectively, allowing for an over 100-dB radar dynamic range. We demonstrate a radar system by cascading two receiver chips and two transmitter chips to enable an

$8 \times 2$

MIMO array, and achieve an 11.3° angular resolution through an outdoor experiment. Prototype radar systems enable for advanced chip cascading, which is beneficial for next-generation scalable high-resolution imaging radars.

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来源期刊

IEEE Journal of Solid-state Circuits 工程技术-工程：电子与电气

CiteScore

11.00

自引率

20.40%

发文量

351

审稿时长

3-6 weeks

期刊介绍： The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.