设计无预充电的高能效内容可寻址存储器

IF 2.8 2区 工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Ramiro Taco;Esteban Garzón;Robert Hanhan;Adam Teman;Leonid Yavits;Marco Lanuzza
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引用次数: 0

摘要

内容可寻址内存(CAM)是一种专门的内存类型,便于大规模并行比较搜索模式与整个内容。最先进的 CAM 解决方案要么速度快但功耗高(NOR CAM),要么速度慢但功耗低(nand CAM)。这些限制源于动态预充电操作,导致 NOR CAM 的功耗过高和 NAND CAM 的充电共享问题。在这项工作中,我们为高能效应用提出了一种免预充电 CAM(PCAM)类别。通过避免预充电操作,PCAM 的能耗低于 NAND CAM,同时搜索速度与 NOR CAM 相当。PCAM 采用 65 纳米 CMOS 技术设计,并在广泛的蒙特卡罗(MC)模拟中进行了全面评估,同时考虑了布局寄生效应。与传统的 NAND CAM 相比,PCAM 的搜索运行时间缩短了 30% 以上,搜索能耗降低了 15%。此外,与传统的 NOR CAM 相比,PCAM 可以减少 75% 以上的能耗。我们进一步将分析扩展到应用层面,使用运行各种基准工作负载的 CPU 模拟器,将 CAM 设计作为全关联高速缓存进行功能评估。这项分析证实,PCAM 是关联存储器及其广泛应用的最佳能效设计选择。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Designing Precharge-Free Energy-Efficient Content-Addressable Memories
Content-addressable memory (CAM) is a specialized type of memory that facilitates massively parallel comparison of a search pattern against its entire content. State-of-the-art (SOTA) CAM solutions are either fast but power-hungry (NOR CAM) or slow while consuming less power (nand CAM). These limitations stem from the dynamic precharge operation, leading to excessive power consumption in NOR CAMs and charge-sharing issues in NAND CAMs. In this work, we propose a precharge-free CAM (PCAM) class for energy-efficient applications. By avoiding precharge operation, PCAM consumes less energy than a NAND CAM, while achieving search speed comparable to a NOR CAM. PCAM was designed using a 65-nm CMOS technology and comprehensively evaluated under extensive Monte Carlo (MC) simulations while taking into account layout parasitics. When benchmarked against conventional NAND CAM, PCAM demonstrates improved search run time (reduced by more than 30%) and 15% less search energy. Moreover, PCAM can cut energy consumption by more than 75% when compared to conventional NOR CAM. We further extend our analysis to the application level, functionally evaluating the CAM designs as a fully associative cache using a CPU simulator running various benchmark workloads. This analysis confirms that PCAMs represent an optimal energy-performance design choice for associative memories and their broad spectrum of applications.
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来源期刊
CiteScore
6.40
自引率
7.10%
发文量
187
审稿时长
3.6 months
期刊介绍: The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.
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