具有共模暂态抗扰度的伪滞后控制间隙时间调制隔离型DC-DC变换器

IF 5.6 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Yang Liu;Yuan Yao;Lin Cheng;Wing-Hung Ki
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引用次数: 0

摘要

提出了一种伪滞后控制的间隙时间调制隔离型dc-dc变换器。设计了一种负载暂态快、输出电压纹波小的伪滞后控制器来约束输出电压。它实现了基于负载电流的间隙时间调制,用于对d类功率放大器(PA)输出的功率进行高效调节。提出了一种利用共模暂态抗扰度(CMTI)完成全局反馈回路的高阻抗负载移位键控(LSK)方案,无需额外的变压器或电容。该原型采用标准的65纳米CMOS工艺实现。在输入电压为2.5 V的情况下,该变换器产生的隔离输出电压范围为1.8 ~ 2.2 V,峰值效率为73.3%,输出电压纹波仅为20 mV。负载电流暂态步进为40-150 mA,该变换器表现出不可观察的过调和过调。CMTI用测量+8和- 12 kV/ $\mu $ s的共模瞬变(cmt)进行了演示。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Pseudo Hysteretic Controlled Gap Time Modulated Isolated DC-DC Converter With Common-Mode Transient Immunity
A pseudo hysteretic controlled gap time modulated isolated dc-dc converter is presented. A pseudo hysteretic controller is designed to bound the output voltage with fast load transient and small output voltage ripple. It implements gap time modulation based on the load current and is used to adjust the power delivered by a Class-D power amplifier (PA) with high efficiency. A high-impedance load shift keying (LSK) scheme is also proposed with common-mode transient immunity (CMTI) to complete the global feedback loop without requiring an additional transformer or capacitor. The prototype is implemented in a standard 65-nm CMOS process. With an input voltage of 2.5 V, the proposed converter generates an isolated output voltage that ranges from 1.8 to 2.2 V with a peak efficiency of 73.3% and an output voltage ripple of only 20 mV. With a load current transient step of 40–150 mA, this converter demonstrates unobservable overshoot and undershoot. CMTI is demonstrated with common-mode transients (CMTs) that measure +8 and −12 kV/ $\mu $ s.
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来源期刊
IEEE Journal of Solid-state Circuits
IEEE Journal of Solid-state Circuits 工程技术-工程:电子与电气
CiteScore
11.00
自引率
20.40%
发文量
351
审稿时长
3-6 weeks
期刊介绍: The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.
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