{"title":"具有共模暂态抗扰度的伪滞后控制间隙时间调制隔离型DC-DC变换器","authors":"Yang Liu;Yuan Yao;Lin Cheng;Wing-Hung Ki","doi":"10.1109/JSSC.2024.3510362","DOIUrl":null,"url":null,"abstract":"A pseudo hysteretic controlled gap time modulated isolated dc-dc converter is presented. A pseudo hysteretic controller is designed to bound the output voltage with fast load transient and small output voltage ripple. It implements gap time modulation based on the load current and is used to adjust the power delivered by a Class-D power amplifier (PA) with high efficiency. A high-impedance load shift keying (LSK) scheme is also proposed with common-mode transient immunity (CMTI) to complete the global feedback loop without requiring an additional transformer or capacitor. The prototype is implemented in a standard 65-nm CMOS process. With an input voltage of 2.5 V, the proposed converter generates an isolated output voltage that ranges from 1.8 to 2.2 V with a peak efficiency of 73.3% and an output voltage ripple of only 20 mV. With a load current transient step of 40–150 mA, this converter demonstrates unobservable overshoot and undershoot. CMTI is demonstrated with common-mode transients (CMTs) that measure +8 and −12 kV/<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>s.","PeriodicalId":13129,"journal":{"name":"IEEE Journal of Solid-state Circuits","volume":"60 3","pages":"861-870"},"PeriodicalIF":5.6000,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Pseudo Hysteretic Controlled Gap Time Modulated Isolated DC-DC Converter With Common-Mode Transient Immunity\",\"authors\":\"Yang Liu;Yuan Yao;Lin Cheng;Wing-Hung Ki\",\"doi\":\"10.1109/JSSC.2024.3510362\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A pseudo hysteretic controlled gap time modulated isolated dc-dc converter is presented. A pseudo hysteretic controller is designed to bound the output voltage with fast load transient and small output voltage ripple. It implements gap time modulation based on the load current and is used to adjust the power delivered by a Class-D power amplifier (PA) with high efficiency. A high-impedance load shift keying (LSK) scheme is also proposed with common-mode transient immunity (CMTI) to complete the global feedback loop without requiring an additional transformer or capacitor. The prototype is implemented in a standard 65-nm CMOS process. With an input voltage of 2.5 V, the proposed converter generates an isolated output voltage that ranges from 1.8 to 2.2 V with a peak efficiency of 73.3% and an output voltage ripple of only 20 mV. With a load current transient step of 40–150 mA, this converter demonstrates unobservable overshoot and undershoot. CMTI is demonstrated with common-mode transients (CMTs) that measure +8 and −12 kV/<inline-formula> <tex-math>$\\\\mu $ </tex-math></inline-formula>s.\",\"PeriodicalId\":13129,\"journal\":{\"name\":\"IEEE Journal of Solid-state Circuits\",\"volume\":\"60 3\",\"pages\":\"861-870\"},\"PeriodicalIF\":5.6000,\"publicationDate\":\"2024-12-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of Solid-state Circuits\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10787447/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Solid-state Circuits","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10787447/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Pseudo Hysteretic Controlled Gap Time Modulated Isolated DC-DC Converter With Common-Mode Transient Immunity
A pseudo hysteretic controlled gap time modulated isolated dc-dc converter is presented. A pseudo hysteretic controller is designed to bound the output voltage with fast load transient and small output voltage ripple. It implements gap time modulation based on the load current and is used to adjust the power delivered by a Class-D power amplifier (PA) with high efficiency. A high-impedance load shift keying (LSK) scheme is also proposed with common-mode transient immunity (CMTI) to complete the global feedback loop without requiring an additional transformer or capacitor. The prototype is implemented in a standard 65-nm CMOS process. With an input voltage of 2.5 V, the proposed converter generates an isolated output voltage that ranges from 1.8 to 2.2 V with a peak efficiency of 73.3% and an output voltage ripple of only 20 mV. With a load current transient step of 40–150 mA, this converter demonstrates unobservable overshoot and undershoot. CMTI is demonstrated with common-mode transients (CMTs) that measure +8 and −12 kV/$\mu $ s.
期刊介绍:
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as circuits modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete circuit design is seldom published. Experimental verification is strongly encouraged.