为 IEEE 802.11ba 设计和分析具有增强转换增益和带外抑制功能的超低功耗三次谐波接收器

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Zongle Ma , Ran Hong , Meiru Liu , Rui Chen , Keping Wang
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引用次数: 0

摘要

本文针对 Wi-Fi 802.11ba 提出了一种具有增强转换增益和高带外抑制能力的超低功耗(ULP)接收器。所提出的基于 6 相非重叠本地振荡器(LO)的三次谐波混频器不仅最大限度地降低了射频(RF)前端的功率,还提高了带外抑制能力。此外,基带电路中还设计了 8 位模拟有限脉冲响应(AFIR)低通滤波器,可在超低功耗的情况下大大提高接收器的邻道抑制(ACR)性能。同时,还提出了零功耗可调抽头电容谐振器,通过使用开关电容进行工艺拐角补偿,减轻了谐振频率偏移的影响。这款 802.11ba 接收器采用 65 纳米 CMOS 工艺设计,有效面积为 0.25 平方毫米。布局后仿真结果表明,当工作频率为 2.4 GHz 时,接收器的 ACR 为 93 dB,电压增益为 51 dB。它在 0.7 V 电源电压下的直流功耗为 197 μW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design and analysis of ultra-low power third-harmonic receiver with enhanced conversion gain and out-of-band rejection for IEEE 802.11ba
This paper presents an ultra-low power (ULP) receiver with enhanced conversion gain and high out-of-band rejection for Wi-Fi 802.11ba. The proposed third-harmonic mixer based on 6-phase non-overlap local oscillator (LO) not only minimizes power of the radio frequency (RF) front-end, but also improves out-of-band rejection. In addition, the 8-bit analog finite impulse response (AFIR) low-pass filter is designed in the baseband circuit, which can greatly improve the adjacent channel rejection (ACR) of the receiver with ultra-low power consumption. Meanwhile, the zero-power tunable tapped-capacitor resonator is proposed, which alleviate the resonance frequency offset impact by using switched capacitors for process corners compensation. This 802.11ba receiver is designed in a 65-nm CMOS process occupying an active area of 0.25 mm2. Post-layout simulation results show that, when operating at 2.4 GHz, the receiver achieves an ACR of 93 dB and a voltage gain of 51 dB. It consumes 197 μW DC power from 0.7 V supply voltage.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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