Rayhaneh Ejlali, Mahdi Vadizadeh, Saeed Haji-Nasiri, Alireza Kashaniniya, Arash Dana
{"title":"无结硅/硅0.7锗0.3场效应晶体管的T形漏极掺杂工程对模拟/射频和高频噪声参数的影响:数值模拟研究","authors":"Rayhaneh Ejlali, Mahdi Vadizadeh, Saeed Haji-Nasiri, Alireza Kashaniniya, Arash Dana","doi":"10.1007/s12633-024-03155-w","DOIUrl":null,"url":null,"abstract":"<div><p>Decreased carrier mobility in the junctionless field-effect transistors (JLFETs) channel limits their performance for applications in high-frequency electronics. This paper presents a drain doping technique based on CMOS technology is offered for the first time to improve the analog/RF performance and high-frequency noise parameters of a CONV-shell doped channel- JLFET (CONV-SDCHJLFET). The proposed device is called DG-JLFET with T-shape drain doping (DG-JLFET with TSDD), in which two main drain regions (regions d<sub>1</sub> and d<sub>2</sub>) are crucial to achieve the desired results. By fine-tuning various influencing factors within these two regions, the DG-JLFET with TSDD achieves a transconductance (g<sub>mmax</sub>) of 4.41 mS/um, a cut-off frequency (f<sub>T</sub>) of 813 GHz, a minimum noise figure (NF<sub>min</sub>) of 0.6 dB and an available associated gain (Gma) of 19.92 dB. g<sub>mmax</sub>, f<sub>T</sub>, NF<sub>min</sub>, and Gma of the SDCh-JLFET increased by 78%, 30%, 53%, and 19.2%, respectively, compared to the CONV-SDCHJLFET with similar dimensions. This device is excellent for analog/RF applications and performs well in high-frequency noise, making it an ideal choice for demanding next-generation telecommunications applications.</p></div>","PeriodicalId":776,"journal":{"name":"Silicon","volume":"16 18","pages":"6465 - 6478"},"PeriodicalIF":2.8000,"publicationDate":"2024-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact of T-Shape Drain Doping Engineering on the Analog/RF and High-Frequency Noise Parameters of Junctionless Si/ Si0.7Ge0.3 FET: A Numerical Simulation Study\",\"authors\":\"Rayhaneh Ejlali, Mahdi Vadizadeh, Saeed Haji-Nasiri, Alireza Kashaniniya, Arash Dana\",\"doi\":\"10.1007/s12633-024-03155-w\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Decreased carrier mobility in the junctionless field-effect transistors (JLFETs) channel limits their performance for applications in high-frequency electronics. This paper presents a drain doping technique based on CMOS technology is offered for the first time to improve the analog/RF performance and high-frequency noise parameters of a CONV-shell doped channel- JLFET (CONV-SDCHJLFET). The proposed device is called DG-JLFET with T-shape drain doping (DG-JLFET with TSDD), in which two main drain regions (regions d<sub>1</sub> and d<sub>2</sub>) are crucial to achieve the desired results. By fine-tuning various influencing factors within these two regions, the DG-JLFET with TSDD achieves a transconductance (g<sub>mmax</sub>) of 4.41 mS/um, a cut-off frequency (f<sub>T</sub>) of 813 GHz, a minimum noise figure (NF<sub>min</sub>) of 0.6 dB and an available associated gain (Gma) of 19.92 dB. g<sub>mmax</sub>, f<sub>T</sub>, NF<sub>min</sub>, and Gma of the SDCh-JLFET increased by 78%, 30%, 53%, and 19.2%, respectively, compared to the CONV-SDCHJLFET with similar dimensions. This device is excellent for analog/RF applications and performs well in high-frequency noise, making it an ideal choice for demanding next-generation telecommunications applications.</p></div>\",\"PeriodicalId\":776,\"journal\":{\"name\":\"Silicon\",\"volume\":\"16 18\",\"pages\":\"6465 - 6478\"},\"PeriodicalIF\":2.8000,\"publicationDate\":\"2024-10-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Silicon\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s12633-024-03155-w\",\"RegionNum\":3,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"CHEMISTRY, PHYSICAL\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Silicon","FirstCategoryId":"88","ListUrlMain":"https://link.springer.com/article/10.1007/s12633-024-03155-w","RegionNum":3,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"CHEMISTRY, PHYSICAL","Score":null,"Total":0}
Impact of T-Shape Drain Doping Engineering on the Analog/RF and High-Frequency Noise Parameters of Junctionless Si/ Si0.7Ge0.3 FET: A Numerical Simulation Study
Decreased carrier mobility in the junctionless field-effect transistors (JLFETs) channel limits their performance for applications in high-frequency electronics. This paper presents a drain doping technique based on CMOS technology is offered for the first time to improve the analog/RF performance and high-frequency noise parameters of a CONV-shell doped channel- JLFET (CONV-SDCHJLFET). The proposed device is called DG-JLFET with T-shape drain doping (DG-JLFET with TSDD), in which two main drain regions (regions d1 and d2) are crucial to achieve the desired results. By fine-tuning various influencing factors within these two regions, the DG-JLFET with TSDD achieves a transconductance (gmmax) of 4.41 mS/um, a cut-off frequency (fT) of 813 GHz, a minimum noise figure (NFmin) of 0.6 dB and an available associated gain (Gma) of 19.92 dB. gmmax, fT, NFmin, and Gma of the SDCh-JLFET increased by 78%, 30%, 53%, and 19.2%, respectively, compared to the CONV-SDCHJLFET with similar dimensions. This device is excellent for analog/RF applications and performs well in high-frequency noise, making it an ideal choice for demanding next-generation telecommunications applications.
期刊介绍:
The journal Silicon is intended to serve all those involved in studying the role of silicon as an enabling element in materials science. There are no restrictions on disciplinary boundaries provided the focus is on silicon-based materials or adds significantly to the understanding of such materials. Accordingly, such contributions are welcome in the areas of inorganic and organic chemistry, physics, biology, engineering, nanoscience, environmental science, electronics and optoelectronics, and modeling and theory. Relevant silicon-based materials include, but are not limited to, semiconductors, polymers, composites, ceramics, glasses, coatings, resins, composites, small molecules, and thin films.