65 纳米 CMOS 全集成 60 GHz 8 元相控阵收发器，带嵌入式天线 T/R 开关

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-11-12 DOI:10.1016/j.mejo.2024.106475

Jing Feng , Haipeng Duan , Tao Zhang , Lin Lu , Lei Luo , Yue Liang , Xin Chen , Depeng Cheng , Long He , Xu Wu , Xiangning Fan , Lianming Li

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引用次数: 0

摘要

本文介绍了一种用于 60 GHz 无线应用的 8 元相控阵异频收发器 (TRX) 芯片。该芯片集成了发射/接收（T/R）元件、双向可变增益驱动放大器（BI-VGDA）、上/下混合链和本地振荡器（LO）链。为了支持时分双工 (TDD) 操作并提高输出功率，通过将低损耗紧凑型片上天线 T/R 开关嵌入功率放大器 (PA) 功率组合器，从而分别实现了高发射机 (TX) 输出功率和低接收机 (RX) 噪声系数 (NF)。拟议的相控阵 TRX 芯片采用 65 纳米 CMOS 工艺制造，占地面积为 5.1 毫米 × 2.5 毫米。通过测量，TX 路径分别提供了 32 分贝的最大转换增益、11.3 分贝的 OP1dB 和 16 分贝的 Psat。RX 路径在 57-66 GHz 范围内实现了 24 dB 的峰值增益和 6.5-9 dB 的 NF。在 16-QAM 调制下，数据传输速率达到 7.04 Gb/s。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A fully-integrated 60-GHz 8-element phased-array transceiver with embedded antenna T/R switch in 65-nm CMOS

This paper presents an 8-element phased-array heterodyne transceiver (TRX) chip for 60-GHz wireless applications. The chip integrates transmit/receive (T/R) elements, bi-directional variable-gain driving amplifiers (BI-VGDAs), up/down mixing chains, and the local oscillator (LO) chain. To support the time division duplexing (TDD) operation and increase output power, a low-loss compact on-chip antenna T/R switch is introduced by embedding it in the power amplifier (PA) power combiner, thereby achieving a high transmitter (TX) output power and low receiver (RX) noise figure (NF), respectively. Fabricated in a 65-nm CMOS process, the proposed phased array TRX chip occupies an area of 5.1 mm × 2.5 mm. With measurements, the TX path provides a 32-dB maximum conversion gain, an 11.3-dBm OP_1dB, and a 16-dBm P_sat, respectively. The RX path achieves a peak gain of 24 dB and an NF of 6.5–9 dB across 57–66 GHz. With the 16-QAM modulation, a 7.04 Gb/s data rate is demonstrated.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.