用于存储器接口的基于加权-VREF 的环路未展开 DFE 的每DFE 偏移测量和消除

IF 5.6 2区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Yong-Un Jeong;Joo-Hyung Chae
{"title":"用于存储器接口的基于加权-VREF 的环路未展开 DFE 的每DFE 偏移测量和消除","authors":"Yong-Un Jeong;Joo-Hyung Chae","doi":"10.1109/TIM.2024.3488135","DOIUrl":null,"url":null,"abstract":"To achieve a high input and output (I/O) bandwidth, memory interfaces adopt a parallel I/O structure, in which the offset caused by systemic and random mismatches can limit the I/O bandwidth; thus, offset measurement and correction are required. A receiver with a loop-unrolled decision feedback equalizer (DFE) can have a per-DFE offset between two loop-unrolled data paths, degrading the overall performance. We propose an offset calibration method that can identify and adjust the per-DFE offset, thereby correcting each input-referred offset between multiple lanes. We implemented a prototype that has a two-lane receiver adopting a one-tap weighted-VREF-based DFE in a 28-nm CMOS process. Its energy efficiency and area are 0.21 pJ/bit/lane and 0.004 mm2/lane, respectively. Through the offset calibration with the DFE, a bit error rate (BER) of 10-12 and an improved eye shmoo were achieved at 12 Gb/s in a total of six data lanes in three chips.","PeriodicalId":13341,"journal":{"name":"IEEE Transactions on Instrumentation and Measurement","volume":"73 ","pages":"1-8"},"PeriodicalIF":5.6000,"publicationDate":"2024-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Per-DFE Offset Measurement and Cancellation of Weighted-VREF-Based Loop-Unrolled DFE for Memory Interfaces\",\"authors\":\"Yong-Un Jeong;Joo-Hyung Chae\",\"doi\":\"10.1109/TIM.2024.3488135\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To achieve a high input and output (I/O) bandwidth, memory interfaces adopt a parallel I/O structure, in which the offset caused by systemic and random mismatches can limit the I/O bandwidth; thus, offset measurement and correction are required. A receiver with a loop-unrolled decision feedback equalizer (DFE) can have a per-DFE offset between two loop-unrolled data paths, degrading the overall performance. We propose an offset calibration method that can identify and adjust the per-DFE offset, thereby correcting each input-referred offset between multiple lanes. We implemented a prototype that has a two-lane receiver adopting a one-tap weighted-VREF-based DFE in a 28-nm CMOS process. Its energy efficiency and area are 0.21 pJ/bit/lane and 0.004 mm2/lane, respectively. Through the offset calibration with the DFE, a bit error rate (BER) of 10-12 and an improved eye shmoo were achieved at 12 Gb/s in a total of six data lanes in three chips.\",\"PeriodicalId\":13341,\"journal\":{\"name\":\"IEEE Transactions on Instrumentation and Measurement\",\"volume\":\"73 \",\"pages\":\"1-8\"},\"PeriodicalIF\":5.6000,\"publicationDate\":\"2024-10-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Instrumentation and Measurement\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10739359/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Instrumentation and Measurement","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10739359/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

为了实现较高的输入和输出(I/O)带宽,存储器接口采用了并行 I/O 结构,在这种结构中,系统性失配和随机失配造成的偏移会限制 I/O 带宽;因此,需要进行偏移测量和校正。带有环形未展开决策反馈均衡器(DFE)的接收器可能会在两条环形未展开数据路径之间产生每个 DFE 的偏移,从而降低整体性能。我们提出了一种偏移校准方法,可以识别和调整每个 DFE 的偏移,从而校正多通道之间的每个输入参考偏移。我们在 28 纳米 CMOS 工艺中实现了一个具有双通道接收器的原型,该接收器采用基于单抽头加权 VREF 的 DFE。其能效和面积分别为 0.21 pJ/bit/通道和 0.004 mm2/通道。通过使用 DFE 进行偏移校准,在 12 Gb/s 速率下,三个芯片中总共六个数据通道的误码率 (BER) 为 10-12,眼图 (eye shmoo) 有所改善。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Per-DFE Offset Measurement and Cancellation of Weighted-VREF-Based Loop-Unrolled DFE for Memory Interfaces
To achieve a high input and output (I/O) bandwidth, memory interfaces adopt a parallel I/O structure, in which the offset caused by systemic and random mismatches can limit the I/O bandwidth; thus, offset measurement and correction are required. A receiver with a loop-unrolled decision feedback equalizer (DFE) can have a per-DFE offset between two loop-unrolled data paths, degrading the overall performance. We propose an offset calibration method that can identify and adjust the per-DFE offset, thereby correcting each input-referred offset between multiple lanes. We implemented a prototype that has a two-lane receiver adopting a one-tap weighted-VREF-based DFE in a 28-nm CMOS process. Its energy efficiency and area are 0.21 pJ/bit/lane and 0.004 mm2/lane, respectively. Through the offset calibration with the DFE, a bit error rate (BER) of 10-12 and an improved eye shmoo were achieved at 12 Gb/s in a total of six data lanes in three chips.
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来源期刊
IEEE Transactions on Instrumentation and Measurement
IEEE Transactions on Instrumentation and Measurement 工程技术-工程:电子与电气
CiteScore
9.00
自引率
23.20%
发文量
1294
审稿时长
3.9 months
期刊介绍: Papers are sought that address innovative solutions to the development and use of electrical and electronic instruments and equipment to measure, monitor and/or record physical phenomena for the purpose of advancing measurement science, methods, functionality and applications. The scope of these papers may encompass: (1) theory, methodology, and practice of measurement; (2) design, development and evaluation of instrumentation and measurement systems and components used in generating, acquiring, conditioning and processing signals; (3) analysis, representation, display, and preservation of the information obtained from a set of measurements; and (4) scientific and technical support to establishment and maintenance of technical standards in the field of Instrumentation and Measurement.
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