基于闪存/SS 架构的 11 位两步列共享 ADC，适用于 CMOS 图像传感器

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2024-10-24 DOI:10.1016/j.mejo.2024.106444

Qiang Zhao , Jitao Xu , Chunhui Fan , Ziming Wang , Ruitong Hu , Xin Li , Zhigang Li , Licai Hao , Chunyu Peng , Zhiting Lin , Xiulong Wu

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引用次数: 0

摘要

传统的单斜率模数转换器（SS ADC）面临着速度限制，制约着 CMOS 图像传感器（CIS）的曝光速度。为了提高用于高帧率 CIS 的 SS ADC 的转换速度，我们提出了一种基于闪存/SS 架构的两步列共享 ADC。ADC 设计方法基于时间压缩和多列共享的概念。一方面，引入了闪存 ADC 和差分斜坡，同时复用两个比较器以提高转换速度。另一方面，在一些电路中采用了多列共享设计，以减少每列的平均面积和功耗。在 256 × 256 像素分辨率的设计环境下，仿真结果显示 ADC 的行时间为 5.4μs，列级平均功耗为 129.5 μW，FoMa 为 527 fJ/step。与传统的 11 位两步式 SS ADC 相比，所提出的 ADC 不仅优化了量化速度，还简化了冗余校准结构。

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An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor

Traditional single-slope analog-to-digital converter (SS ADC) faces a speed limitation that constrains the exposure speed of CMOS image sensors (CIS). To enhance the conversion speed of SS ADCs used in high frame rate CIS, a two-step column-shared ADC based on Flash/SS architecture is proposed. The ADC design approach is based on the concepts of time compression and multi-column sharing. On one hand, a Flash ADC and differential ramps are introduced while two comparators are multiplexed to enhance the conversion speed. On the other hand, a multi-column shared design is employed in some circuits to reduce the average area and power consumption per column. Under a design environment of 256 × 256 pixel resolution, the simulation results show that the row time of ADC is

5.4 μ s

, the column-level average power consumption is 129.5

μ

W, and the FoMa is 527 fJ/step. Compared to the conventional 11-bit two-step SS ADC, the proposed ADC not only optimizes quantization speed but also simplifies the redundant calibration structure.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.