Ran Yao;Zheyan Zhu;Hui Li;Wei Lai;Xianping Chen;Francesco Iannuzzo;Renkuan Liu;Xiaorong Luo
{"title":"基于按压封装的分立式碳化硅 MOSFET 器件的双面冷却方法","authors":"Ran Yao;Zheyan Zhu;Hui Li;Wei Lai;Xianping Chen;Francesco Iannuzzo;Renkuan Liu;Xiaorong Luo","doi":"10.1109/OJPEL.2024.3479293","DOIUrl":null,"url":null,"abstract":"The conventional TO-247-3 packages with single-sided cooling limit the thermal and electrical performances of discrete SiC MOSFET devices. In this paper, a double-sided cooling press-pack (PP) packaging approach for the discrete SiC MOSFET device is proposed to optimize its thermal and electrical performances. First, a double-sided cooling PP structure for the discrete SiC MOSFET devices is designed with a copper foam gate pin and an embedded fixture. Then, based on finite element simulations, the steady-state thermal and electrical performances of the discrete SiC MOSFET device with the double-sided cooling PP package are analyzed, and the parasitic inductance of the designed SiC MOSFET device is extracted by the ANSYS Q3D software. Finally, a prototype of the double-sided cooling PP SiC MOSFET device is fabricated, and test platforms are established to verify its performance. The research findings demonstrate that the designed double-sided cooling PP SiC MOSFET device can reduce thermal resistance and switching loss by 47.4 % and 42.3%, respectively.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":null,"pages":null},"PeriodicalIF":5.0000,"publicationDate":"2024-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10719678","citationCount":"0","resultStr":"{\"title\":\"A Double-Sided Cooling Approach of Discrete SiC MOSFET Device Based on Press-Pack Package\",\"authors\":\"Ran Yao;Zheyan Zhu;Hui Li;Wei Lai;Xianping Chen;Francesco Iannuzzo;Renkuan Liu;Xiaorong Luo\",\"doi\":\"10.1109/OJPEL.2024.3479293\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The conventional TO-247-3 packages with single-sided cooling limit the thermal and electrical performances of discrete SiC MOSFET devices. In this paper, a double-sided cooling press-pack (PP) packaging approach for the discrete SiC MOSFET device is proposed to optimize its thermal and electrical performances. First, a double-sided cooling PP structure for the discrete SiC MOSFET devices is designed with a copper foam gate pin and an embedded fixture. Then, based on finite element simulations, the steady-state thermal and electrical performances of the discrete SiC MOSFET device with the double-sided cooling PP package are analyzed, and the parasitic inductance of the designed SiC MOSFET device is extracted by the ANSYS Q3D software. Finally, a prototype of the double-sided cooling PP SiC MOSFET device is fabricated, and test platforms are established to verify its performance. The research findings demonstrate that the designed double-sided cooling PP SiC MOSFET device can reduce thermal resistance and switching loss by 47.4 % and 42.3%, respectively.\",\"PeriodicalId\":93182,\"journal\":{\"name\":\"IEEE open journal of power electronics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":5.0000,\"publicationDate\":\"2024-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10719678\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE open journal of power electronics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10719678/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of power electronics","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10719678/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
单面冷却的传统 TO-247-3 封装限制了分立式 SiC MOSFET 器件的热性能和电气性能。本文提出了一种用于分立式 SiC MOSFET 器件的双面冷却压包(PP)封装方法,以优化其热性能和电气性能。首先,设计了一种用于分立 SiC MOSFET 器件的双面冷却 PP 结构,该结构具有泡沫铜栅极引脚和嵌入式夹具。然后,基于有限元仿真,分析了采用双面冷却 PP 封装的分立 SiC MOSFET 器件的稳态热性能和电性能,并利用 ANSYS Q3D 软件提取了所设计 SiC MOSFET 器件的寄生电感。最后,制作了双面冷却 PP SiC MOSFET 器件的原型,并建立了测试平台来验证其性能。研究结果表明,所设计的双面冷却 PP SiC MOSFET 器件可将热阻和开关损耗分别降低 47.4% 和 42.3%。
A Double-Sided Cooling Approach of Discrete SiC MOSFET Device Based on Press-Pack Package
The conventional TO-247-3 packages with single-sided cooling limit the thermal and electrical performances of discrete SiC MOSFET devices. In this paper, a double-sided cooling press-pack (PP) packaging approach for the discrete SiC MOSFET device is proposed to optimize its thermal and electrical performances. First, a double-sided cooling PP structure for the discrete SiC MOSFET devices is designed with a copper foam gate pin and an embedded fixture. Then, based on finite element simulations, the steady-state thermal and electrical performances of the discrete SiC MOSFET device with the double-sided cooling PP package are analyzed, and the parasitic inductance of the designed SiC MOSFET device is extracted by the ANSYS Q3D software. Finally, a prototype of the double-sided cooling PP SiC MOSFET device is fabricated, and test platforms are established to verify its performance. The research findings demonstrate that the designed double-sided cooling PP SiC MOSFET device can reduce thermal resistance and switching loss by 47.4 % and 42.3%, respectively.