Anti-machine-learning-attack strong PUF design based on multi-path delay selection strategy

Physical unclonable functions (PUF) have significant potential for application in information security. However, strong PUFs are vulnerable to machine learning (ML) modeling attacks, which severely limit their application in device authentication. Despite a variety of resistance techniques, strong PUFs suffer from hardware cost and stability deficiencies. This study proposes an anti-machine-learning-attack strong PUF based on a multi-path delay selection strategy through research on the entropy source of a strong PUF and the delay signal selection mechanism. First, we constructed a deviation source circuit based on multiplexers to increase the diversity of the delay signal transmission paths. Second, we constructed a delay selection circuit based on the logic gates. This circuit dynamically selects the delay signals with the same transmission path in the deviation source using AND and OR gates. Subsequently, the deviation source and delay selection circuits were utilized to construct the delay module, and the interconnection module was inserted between the delay modules to achieve alternating appearances of different types of logic gates along the delay path. Finally, RS flip-flops were employed to make decisions on the bias signals with the same delay path, and the final response was output through an XOR operation. The proposed PUF was implemented on a Xilinx Artix-7 FPGA, and the prediction accuracy of the four typical ML models was below 59 % (with 500,000 challenge-response pairs as the training set). Moreover, the proposed PUF structure is scalable and exhibits better performance in terms of hardware cost and stability than existing classic structures.